LTC6957 - Implications of Not Meeting Input Common Mode Voltage

Hi, 

I wanted to follow up on question asked in the link below. In the answer to this question, comments were made about the implications of not meeting the LTC6957 input common mode voltage specification. It was mentioned that the input diodes could clip if the input common mode range specs were not met, and this could cause variation in tpd. I would like to better understand what the implications are of not meeting this common mode voltage specification. For example, if operating with 1.6V or 1.7V common mode rather than minimum 1.8V, would that really cause any difference in operation of the part?

  • Now that it's close to two years later, does ADI have any additional information on performance degradation associated with not meeting the common mode input voltage specification?
  • Can you clarify comment about diode clipping if input common mode voltage range is not met? What would be the diode conduction path in the image you showed?
    • It looks like there are back to back diodes between IN+ and IN-. I understand these would clip the signal if the input differential voltage is too large, but would not seem related to common mode voltage specification. 
    • It looks like there are diodes clamping IN+ and IN- to VCC (3.3V) and to GND. I think these would prevent inputs from going above VCC or below GND.
    • I am not seeing how these diodes would clip the signal if violating the input common mode range unless this caused the input signal to go above VCC or below GND. 
      • Would it be right to state the diodes would not clip the signal, even if violating the input common mode specification, unless the signal went above VCC or below GND?

https://ez.analog.com/clock_and_timing/f/q-a/113203/ltc6957-common-mode-dispersion-for-line-receiver-circuit

Thanks

  • 0
    •  Analog Employees 
    on Apr 9, 2021 9:32 PM

    In question in the link provided, It looks like I may have been thinking about a common mode offset when I replied.  Although that really wasn't that question asking about.  

    You have a correct understanding of the back to back diodes and how they would clip the input signal.  

    The device was designed and characterized with the common mode voltage range that is shown for the AC-coupling spec in the datasheet.  I would suspect a lower  common mode voltage than the 1.8V on the base of the input transistor would begin to cut into the headroom of the 2mA current source shown in figure 1's input network.  When this happens to a current source typically device's performance and delays change.  However, I do not have data to indicate how much this will affect the LTC6957 specifically.  At 1.6V common mode(1.8V-0.2V), I think you can probably assume the max Vpp is now 1.6V (2V-0.2V*2), to avoid this headroom concern.  However, let me double check this with design.

  • +1
    •  Analog Employees 
    on Apr 12, 2021 7:57 PM in reply to ChrisPearson

    Well, I was wrong. The common mode is set by a couple of Vbe (0.85V'ish) drops for the current source.  Vbe will be its largest at the lower temperatures.  The 1.8V limit is adequate over temperature.  As your common mode drops below 1.8V you will gradually see more noise on the output.