Hi,
I have a FMCDAQ2 board that i run with Xilinx KC705. i want to write a vhdl code for it myself and have difficulty with AD9523-1. although i can lock PLL2, i have no Feedback clock (bit 6 in register 0x22C is '0') and i have nothing on output channels . so i thought if i have a default register dump, i can probably find the problem. but i could not find it anywhere.can anyone help with this?
and this is My register map:
0x000=0x00
0x004=0x01
0x010=0x00
0x011=0x00
0x012=0x00
0x013=0x00
0x014=0x00
0x016=0x00
0x017=0x00
0x018=0x0C
0x019=0x00
0x01A=0x01
0x01B=0x00
0x01C=0x00
0x01D=0x00
0x0F0=0x75
0x0F1=0x06
0x0F2=0x1B
0x0F3=0x08
0x0F4=0x73
0x0F5=0x3A
0x0F6=0x00
0x0F7=0x01
0x190=0x20
0x191=0x00
0x192=0x00
0x193=0x03
0x194=0x00
0x195=0x04
0x196=0x20
0x197=0x09
0x198=0x00
0x199=0x20
0x19A=0x00
0x19B=0x00
0x19C=0x03
0x19D=0x01
0x19E=0x04
0x19F=0x03
0x1A0=0x7F
0x1A1=0x04
0x1A2=0x03
0x1A3=0x7F
0x1A4=0x04
0x1A5=0x03
0x1A6=0x7F
0x1A7=0x04
0x1A8=0x03
0x1A9=0x7F
0x1AA=0x04
0x1AB=0x03
0x1AC=0x01
0x1AD=0x04
0x1AE=0x20
0x1AF=0x00
0x1B0=0x00
0x1B1=0x20
0x1B2=0x00
0x1B3=0x00
0x1B4=0x20
0x1B5=0x00
0x1B6=0x00
0x1B7=0x03
0x1B8=0x00
0x1B9=0x04
0x1BA=0x00
0x1BB=0x01
0x230=0x02
0x231=0x03
0x232=0x00
0x233=0x00
0x234=0x01
