Clock distribution to 2 DDSs (9913) and 2 ADCs (AD7769)

Hi,

the AD9577 is a good choice if the 40 MHz clocks to the AD9913 may not be phase aligned to the 40 MHz clocks to the AD7769.

The AD9577 has two PLLs that are not recommended to work at the same frequency because  the jitter performance is degraded (page 34 in revA data sheet).

The AD9577 outputs LVPECL, LVDS or 3.3V CMOS clocks. The AD9913 accepts LVPECL or LVDS inputs, so the AD9577 is OK to provide clocks to it. 

Please note the AD7769 is obsolete, so my recommendation is to use another chip.

If the phase alignment is a requirement, then I recommend the AD9576. It has more outputs (which you do not need), but it should be cheaper than the AD9577.

Petre 

Hi,

the AD9577 is a good choice if the 40 MHz clocks to the AD9913 may not be phase aligned to the 40 MHz clocks to the AD7769.

The AD9577 has two PLLs that are not recommended to work at the same frequency because  the jitter performance is degraded (page 34 in revA data sheet).

The AD9577 outputs LVPECL, LVDS or 3.3V CMOS clocks. The AD9913 accepts LVPECL or LVDS inputs, so the AD9577 is OK to provide clocks to it. 

Please note the AD7769 is obsolete, so my recommendation is to use another chip.

If the phase alignment is a requirement, then I recommend the AD9576. It has more outputs (which you do not need), but it should be cheaper than the AD9577.

Petre