Customer use 10MHz reference clock to Ref of ADF4002. They would like to get output frequency is 128.88MHz. We help setting these parameters as attached. Has any problem or risk of ADF4002 setting for 128.88MHz ?
Another question, if use fractional PLL, has any suggest solution for it ? Thank you.
[edited by: firstname.lastname@example.org at 2:16 PM (GMT -5) on 5 Feb 2021]