Questions about holdover test conditions in AD9557

In order to obtain the results of HOLDOVER SPECIFICATIONS shown in Datasheet table 14., How long the AD9557 needs to operate normally?

  • How long should the AD9557 run normally before running the holdover test to meet the frequency precision in the datasheet?

  • Other chip makers with similar functions have said that the time is about 5 minutes.

  • 0
    •  Analog Employees 
    on Nov 9, 2020 4:22 PM in reply to swjung

    HI,

    when the DPLL enters holdover, it uses a tuning word equal to the average of the tuning word used by the DPLL prior to entering the holdover.

    The registers 0x315-0x314 determine the history accumulation timer. The default is 10 ms, while the max value is 65s. The register 0x316 manages how the DPLL uses the tuning word history during holdover.

    The table 14 you refer in your question states the accuracy of the output frequency right when the chip enters holdover. It specifies that typically, that error is less than 0.01 ppm.  The DPLL must have been locked prior to entering holdover and the tuning word averaging machine must have worked over a full cycle (based on the register settings above) to ensure that accuracy.

    Petre 

  • Thank you for the reply.

    You said you can set History Accumulation Timer from default 10ms up to 65,535ms.

    Answer the two questions below.
    1) Can I check the value of History Accumulation Timer for performing the test in Data Sheet Table 14?

    2) If I set the History Accumulation Timer to 10ms (0x0A), can I check the holdover time as a result of Table 14 (0.01ppm)?

    I look forward to your answer.

    Thank you.

  • +1
    •  Analog Employees 
    on Nov 10, 2020 6:24 PM in reply to swjung

    Hi,

    I am afraid you cannot read the value of the history accumulation timer. You can get an interrupt when there is sufficient tuning word history available for holdover operation. See Bit 4 in register 0xD05. You can also poll the bit 4 in register 0xD09 for a related flag.

    You can read the DCO frequency tuning word that is generated by the tuning word history logic in registers 0xD0D to 0xD10.

    I do not understand question 2. I do not know what specific timer value was used to state that Table 14 entry.

    Please tell me what is the end game of these questions. What do you want to accomplish with the AD9557?

    Petre