I wanted to get some guidance on using an oscillator with an LVDS output to drive the CLK pins (input clock) on the AD9516-1. The reference design I'm using has a LVPECL oscillator and is configured as an AC-Coupled LVPECL with Parallel Transmission Line (it matches Figure 73 in the AD9516-1 datasheet).
I'm assuming I can just treat the CLK pins as LVDS input (just 100 ohm termination across the 100 ohm differential pair, like Figure 74 in the datasheet), but I wanted to double check. The datasheet is a little vague in that it just says "Accepts LVPECL, LVDS, or CMOS."