AD9557 Input-to-Output delay?

I have a relatively slow clock (nominally 9.38MHz) with appreciable cycle-to-cycle jitter which needs to be removed.

It is important, however, that the input-to-output delay (phase) be consistent across power-up/reset cycles.

(i.e. if the delay at one startup is nominally "n", the delay at the next startup is also nominally "n".

"n" does not need to be zero, it just needs to be the same from run-to-run.) 

Is the AD9557 consistent in this way or is there another similar part which would be?

  • 0
    •  Analog Employees 
    on Dec 21, 2012 12:44 AM

    Dear WDB,

    The AD9557 has a "SYNC on REF input" feature that's a one-shot sync using the ref input.

    If the ref input's phase isn't varying too much, then you'll have a constant input-output phase relationship. However, if the input phase is varying from cycle-to-cycle, then it will become the major source of static phase offset variaton.

    All that said, the AD9547 has a self-disciplined sync without this limitatoin.

    -Paul Kern