On our board we are using AD9517-4 device. the SPI lines are controlled using Xilinx FPGA. after setting it in 4 wire SPI mode the write is happening properly. But whenever we try read operation it happens only one time. after the read operation the device SPI stops working means the write and read both operation doesn't works after that one read operation.
Am i missing some SPI settings for the device? i tried without the read operation then the write operation is functioning properly.
after giving hardware reset to device the write operation again works.
Thanks and Regards,
Is the normal 3-wire SPI is working fine for reads of any number of bytes?
Is the read in 4-wire mode that hangs the SPI bus occuring correctly? How is the transaction terminating?
The most frequent cause of a hung SPI bus is what we call "CSB stalled high." This happens when you're doing a multi-byte transfer, and the CSB pin is pulled high on a byte boundary.
When this happens, the transfer is paused, and the serial port is waiting for CSB to go low again to continue the transfer. However, the serial port will appear to be hung if you're trying to issue another command.
If this is not what is happening, there may be something happening with the last bit or clock edge on a transfer. I seem to recall something about zero hold time on the last bit of a transfer in which SDO tri-states on the last SCLK rising edge. This is not normally an issue, as SCLK comes from the host device thats reading SDO, so it should have time to read the last bit. However, even that shouldn't cause a hung SPI bus.
Hi Paul Kern my AD9517-4 also does'n work.