I need to drive several high speed DDSs and IF receivers. In order to attain (very) low jitter/phase noise, I intend to use TCXO with <1 ppm stability. I use the scheme of CN-0121: Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers. However, in the CN-0121 the AD9520 is driven with a Xtal, and I want to use (10 MHz) TCXO to obtain 600MHz clock for to DDSs and the IF receivers.
Can some on help me with this?
Reference for design notes are welcome as well.
Thanks and smile in advance.
The AD9520 can be driven with a TXCO with either single ended or differential outputs. The AD9520 provides a self biased receiver so most differential inputs can simply be ac coupled. Please refer to the PLL reference inputs section of the AD9520 datasheet.
You will also want to pick the AD9520 with the a VCO center frequency that is an integer multiple of 600MHz. (AD9520-1 and AD9520-3 will work fine).
Please let me know if you have any other questions.