I am using an AD9549 on our own board:
- 10 MHz Input on REFA
- 10 MHZ (XO) Input for SysCLK
- 1 GHz SysCLK
- 10 MHZ Output
I start with the single tone mode (which works fine) and change to closed loop after a valid signal is detected on REFA.
The holdover and recovery works also fine, but I get never a phase lock and I also see on the oscilloscop that the output signal is not locked to the reference signal.
Is there a way to debug this problem?