We're designig a product that requires both a very good frequency stability and a very low phase noise and jitter as we need to clock a 14 bit 170Msps ADC (an AD9643), an AD9707 DAC and get a reference for an ADF4351 synthesizer.
We're going to use two crystal oscillators, a ultra stable reference (in the low 100's of ppb range) and a ultra low phase noise VCXO and "combine" them with a PLL. We thought about the CVHD-950 series from crystek for VCXO. According to ADIsimCLK simulations it is a little bit overkill for our application as we're sampling at 1st nyquist zone but it's a very cheap part compared to other products that would barely meet performance requirements and cost about the same. As for the pll/distribution chip we found that AD9511 meets our requirements very well and it has the exact number and type of outputs we need. However it seems that the CVHD-950 can't directly interface to AD9511's CLK2 input as it has 3.3V CMOS output and the AD9511's max input swing is only 2 Vpp and should also be AC-coupled.
Could you recommend a simple interface circuit for this case? The VCXO will run at 122,88 MHz