On the ADCLK925, with Vcc = 3.3V and a single-ended clock input, is the worst-case required threshold for a logic high really all the way to the 3.3V rail?
It would be clearer if both datasheets were like the ADCLK954. The author of the ADCLK925 datasheet was trying to specify the input voltages in terms of a ground-referenced, single-ended signal. This was done to hopefully make it easier to interface to the part. In the future, I'm going to advocate that we specify the input voltages for bipolar parts like this in the manner of the ADCLK954.
Fortunately, the ADCLK925 datasheet has a spec for the differential input voltage swing, and one can infer the common mode voltage range by looking at Vih/Vil. For instance, it's clear by looking at Vih min on the ACDLK925 that the minimum common mode voltage is 0.8V.