• State Verified Answer
  • Replies 2 replies
  • Subscribers 155 subscribers
  • Views 453 views
  • Users 0 members are here
Options
Related

Low frequency output voltage noise in ADCLK905 / ADCLK907 / ADCLK925 family

Tim.Timer
on Aug 3, 2015

Hello,

i wonder if the RMS voltage noise of the ADCLK905 family of chips can be calculated from the specifications. More specifically: If i apply a constant input signal, what is the output voltage RMS noise in the frequency range of 0-100MHz (assuming a prefect low pass)?

I hope this can be calculated from the specification of: -161 dbc/Hz phase noise, but i am not very familiar with this quantity. Is the following calculation sensible?

-161 dbc/Hz * 100MHz = 10e-16 * 10e8 = 10e-8  in units of signal to noise power.

Voltage noise is then sqrt(10e-8) = 10e-4

The output signal voltage is 800mV, so the RMS noise 800mV * 10e-4 = 0.4 µV

0.4 µV rms noise seems very low for a chip that is optimized for fast transitions, so i assume i made an error..

I hope this made sense. Any help is greatly appreciated.

Sincerely,

Tim

Parents
  • 0
    •  Analog Employees 
    on Aug 2, 2018 3:08 PM
    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
    EZ Admin
Reply
  • 0
    •  Analog Employees 
    on Aug 2, 2018 3:08 PM
    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
    EZ Admin
Children
No Data