I just only use Ref A(19.2MHz), left the RefB/RefC/RefD open (I just put the 0.01MHz for refb due to the GUI ask for 1 input for the other 3Ref input), 4chanel total 8port output 167.33166MHz, the following fig shows, system clock is 49.152Mhz
Does these setting work for board?
this is 49.152MHz system clk (I just get the single-end data,which is differetial input)
here is the 19.2MHz clk for the Ref A input
we am just debug the board use the AD9554 for the OTU2 ref clock, the processor could access AD9554 by I2C port. and could get the Device ID, also could read and write Reg 0x200 and 0x201 ..
we don't use the EPROM, so left the M-pin open.
we just set the register from register0x200~register0x365.
But there are no output clk at the portA/B/C, Is there any other setting we need to config to get the output clock from AD9554?
we use the wizard to get the NonDefault register map(111 nondefault reg), last pic shows. we only could set part of these reg, such as Reg0x200,Reg0x204,~reg0x346, while we can not set the other regs, from 0x400 to the end,
any clue why we can not change the nondefault register setting?
Is there any setting we should pay more attention?
Thank you in advance
Here is the operation step and reg check result.
Initially, we configure the chip step by step manually based on the .stp file(include 'calibrate all' command and then a 'sync all'), which I sent here yesterday, which looks the ref clk quality is not good
then check the reg value as you mentioned:
Reg0xd01 = 0x03 , sometimes its Reg0xd01 = C3
Reg0xd02 = 0x07
Reg0xd20 = 0x06
Reg0xd21 = 0x01
Reg0xd22 = 0x02
Reg0xd23 = 0x00
Reg0xd24 = 0x00
Reg0xd25 = 0x00
Reg0xd26 = 0x00
secondly, we configure the chip aotumaticlly using script（include 'calibrate all' command and then a 'sync all'） based the same .stp file, which looks the ref clk quality is not good while still could locked, (initially mannaully input maybe typo )
then check the reg value : Reg0x40~46 is same as Reg0x20~0x26
Reg0xd01 = 0xF3
Reg0xd20 = 0x0f
Reg0xd22 = 0x00
Today , after configure the chip automaticlly（include 'calibrate all' command and then a 'sync all'）, then manually calibrate all and sync all (manually input the command as you sugguest before: rite R0x0A00 = 0x02
Write R0x000F = 0x01; write R0x0A00 = 0x04; write R0x000F = 0x01;Write R0x0A00 = 0x00;Write R0x000F = 0x01), then check the register again. now looks the chip 4channel all locked, as the following reg show, Could you please confirm the chip work ok now?
Reg0xd02 = 0xF8
Reg0xd20 = 0x0F
Reg0xd21 = 0x00
Reg0xd22 = 0x01
Reg0xd23 = 0xa4
Reg0xd24 = 0x92
Reg0xd25 = 0x42
Reg0xd26 = 0x21
Reg0xd40 = 0x0F
Reg0xd41 = 0x00
Reg0xd42 = 0x01
Reg0xd43 = 0xa3
Reg0xd44 = 0xa7
Reg0xd45 = 0x4c
Reg0xd46 = 0x30
Reg0xd02 = 0xf8, means,bit = 1means REFA valid This bit is 1 if the REFA frequency is within the programmed limits and the validation timer has expired.
what is "the validation timer has expired", Could you please explane what the timer expired means, and how to improve it.
Thank you so much for the patient support and help.