I'm having problems in programming the EEPROM of the AD9520.
I use the SPI to program the PLL.
When I try to configure directly the PLL via SPI, it works and the wanted clock is at the output;
I can see the lock signal at '1' and everything goes fine.
When I try to program the EEPROM, problems start.
I am doing as follows:
1) I program the PLL as I want ( and I see the lock at '1'); in particular, I set the status pin in such a way to see the EEPROM status
2) I set 0xb02 at '1'
3) I set 0xb03 at '1'
4) I set an update with 0x232 at '1'
I do not see the status pin at '1' (as it should be during the EEPROM programming) and it looks like the eeprom is not programmed at all; if I try to give a self-clearing soft reset (0x000), with the EEPROM pin high I do not see the new configuration loaded.
The strange part is that if I try to set 0xb02 at '1', set 0xb02 at '1' and then 0x232 at '1', as soon as I try to read again 0xb02 it is at '0' ( it looks like the EEPROM write is not enabled). I also tried to set 0xb02 at '1' and update but when I read it back, it is at '0'.
I'll need to look at this more closely, but it appears that your procedure is correct, although I would omit the R0x0232=0x01 (the third step) when burning the EEPROM, as I'm pretty sure that the EEPROM burn bit are live.
At that point, you should be able to monitor the EEPROM status bit.
I'll look at this more closely once I'm back in the office.
any news about the AD9520 EEProm programming phase?
I'm not sure where the problem is.
If you write R0x0B02=0x01, and then write R0x0B03=0x01, are you able to eventually read R0x0B00=0x00 and R0x0B01=0x00?
If so, then you are completing the EEPROM burn process ok.
At this point, you should be able to reset the AD9520 with the EEPROM pin high and have it load the EEPROM.
Keep in mind that you may have EEPROM loading issues on power-up if the power supply pins ramp too slowly.
This is why we recommend that you leave the RESET pin high at power up, and then pulse the RESET pin HIGH-LOW-HIGH after the power supply is stable in order to guarantee EEPROM loading.