hi,
i am using AD9552 with 10pF crystal(7m-20.000MEEQ-T).
Since this crystal has a capacitance of 10pF, i am using 10pF load capacitance(assuming stray capacitance of 5pF) on both the legs of the crystal on board.
Now should i adjust the 0x1B register of AD9552 to accommodate this crystal? or is it only one of them either internal or external load capacitance has to be used?
{the datasheet says --"The internal load capacitance consists of a fixed component of 13 pF and a variable (programmable) component of 0 pF to 15.75 pF. "
"To accommodate crystals with a specified load capacitance other than 15 pF (8 pF to 23.75 pF), the user can adjust the program-mable capacitance in 0.25 pF increments via Register 0x1B[5:0]. Note that when the user sets Register 0x1B[7] to 0 (enabling SPI control of the XTAL tuning capacitors), the variable capacitance changes from 2 pF (its power-up value) to 15.75 pF due to the default value of Register 0x1B[5:0]. This causes the crystal load capacitance to be 23.75 pF until the user overwrites the default contents of Register 0x1B[5:0]."}
the above lines are confusing for me. does it mean we should not use any load capacitance on two legs on crystal in the board?
how can i tell the chip i am using 10pF crystal?
thank you for reply.
