I want use a HMC720LP3E as fanout buffer with a very low skew between the two output ports, the input clock will be 10-20 Mhz and I need to interface two LMK04828 (http://www.ti.com/lit/ds/symlink/lmk04828.pdf) that accepts a LVDS or LVPECL standard (see pag 96). The two LMKs are at 20cm away from the source after an high speed connector, considering the cost of this chip i need to understand which skew i will obtain on the input after the AC capacitor and Rt for proper termination. The LMK has a internal bias so i think that the right termination is the following could someone verify if is it correct? The input must interface a lvpecl output of the NB7L572 (http://www.onsemi.com/pub_link/Collateral/NB7L572-D.PDF) .
you can use the following interface between HMC720 and NB7L572. Normally, HMC720's supplies are GND and -3.3V, however you can shift them by 3.3V and operate it between 3.3V and GND. You can connect 3.3V to VT of NB7L572. Therefore you dont have to use AC capacitors and worry about its skew.
To shift supplies of hmc720 by 3.3V, you have to connect 3.3V to GND and GND to Vee pins. You have to use good decoupling capacitors from 3.3V to actual GND also
I dont know if you can do the same trick for NB7L572 to make it work between GND and -3.3V. If that was the case, you can connect GND to VT