How does ADN2812 jitter could not tolerate 0.067 UIp-p synchronizing with 15 MHZ data stream; could ADN2913 tolerate the 0.067 UIp-p at 15MHZ?
How does ADN2812 jitter could not tolerate 0.067 UIp-p synchronizing with 15 MHZ data stream; could ADN2913 tolerate the 0.067 UIp-p at 15MHZ?
Dear HNL,
Sorry for my typo, it should be 1.3MHz instead of 1.3kHz.
Did you lock on to an input clock signal or a burst mode PRBS type of modulated data signals?
Both ADN2812 and ADN2913 supports continuous mode, PRBS type, NRZ encoded data signals. If your input data signal is a burst mode signal, both ADN2812 and ADN2913 would lost lock easily.
Best Regards,
Dongfeng
Dear HNL,
Sorry for my typo, it should be 1.3MHz instead of 1.3kHz.
Did you lock on to an input clock signal or a burst mode PRBS type of modulated data signals?
Both ADN2812 and ADN2913 supports continuous mode, PRBS type, NRZ encoded data signals. If your input data signal is a burst mode signal, both ADN2812 and ADN2913 would lost lock easily.
Best Regards,
Dongfeng