Hi all,
Our customer had simulated the AD9520-x w/ using the ADIsimCLK1.7.With the following the questions, the limited functions are bug ? or default setting ?
The limited functions are only on ADIsimCLK1.7, not on the each devices ?
1.AD9520-5 modelCan not it simulate the PLL with external VCO ?Is it bug ?
How to simulate the PLL with external VCO @ AD9520-5 ?
2.AD9520-4 modelIt can simulate the PLL with external VCO, but can not change the R divider.Is it bug ?
How to simulate the PLL with external VCO @ AD9520-4, changing the R divider ?
Best regards,sss
1.AD9520-5 model Can not it simulate the PLL with external VCO ? Is it bug ?
Yes, this is a bug. Thanks for finding it. As a workaround you should be able to design loop filters and predict phase noise / jitter using the AD9520-4 (as it looks like you have tried).
2.AD9520-4 model It can simulate the PLL with external VCO, but can not change the R divider. Is it bug ?
When you set up the design using the wizard pages, you set the PD frequency here:
and the reference frequency on a later page:
if you change the reference frequency here, R will change.
To revisit the wizard pages, click on the configuration button from the main toolbar.