Hi,
We will be designing a custom based board based on ADRV9008-2 with Xilinx FPGA. With regard to that out of AD9528 or HMC7044 which one will be providing better performance
Regards,
Sudarshan
AD9528
Recommended for New Designs
The AD9528 is a two-stage PLL with an integrated JESD204B/JESD204C SYSREF generator for multiple device synchronization. The first stage phase-locked loop...
AD9528 on Analog.com
HMC7044
Recommended for New Designs
The HMC7044 is a high performance, dual-loop, integer-N jitter attenuator capable of performing reference selection and generation of ultralow phase noise...
HMC7044 on Analog.com
ADRV9008-2
Recommended for New Designs
The ADRV9008-2 is a highly integrated, RF agile transmit subsystem offering dual channel transmitters, observation path receiver, integrated synthesizers...
Datasheet
ADRV9008-2 on Analog.com
Hi,
We will be designing a custom based board based on ADRV9008-2 with Xilinx FPGA. With regard to that out of AD9528 or HMC7044 which one will be providing better performance
Regards,
Sudarshan
the same question, but in board with 2x ADRV9026 + Kintex 7
the same question, but in board with 2x ADRV9026 + Kintex 7
HI,
the AD9528 can be used with a Crystek 122.88 MHz VCXO ( CVHD-950-122.880, the one it populates as Y2 on the AD9528 evaluation board) to provide DEVCLK to ADRV9026. Keep RF PLL BW to at least 200 kHz, so EVM levels 5 to 7 dB lower than -40 dB can be obtained.
The AD9528 is used on the ADRV9008 evaluation board, so the AD9528 should provide the right DEVCLK to the ADRV9008 as well.
I do not support HMC7044, so I cannot state anything about it.
These questions should be posted on the ADRV community websites, so the apps engineers supporting the ADRV chips are able to provide their inputs.
Petre