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Some questions about using AD9520

Hello,I have some questions about using  AD9520 PLL.

I make a board of AD9520-3 .The REFCLK is 25MHz.The configuration of the PLLare shown below: R=100; N=8000; charge pump is 4.8mA.I design the PLL loop filter by ADIsimCLK as so:


I want the output signal is 2GHz,so I route VCO divider input directly to the outputs.Then I have somesquestions as follow:

1 The frequency of outout is 2.450GHz,after the VCO calibration.But without the VCO calibration,The frequency of outout is 2GHz.

2 When the frequency of output is 2GHz,the PLL isnot locked.The pin CP is always 5V,  the pin LF is always 3.7V,which are greater than the maximum data in the datasheet.I detect the signal on the pin STATUS.When the 0x017[7:2]=000010,I can see the R divider output.When the 0x017[7:2]=000001,0x017[7:2]=000011,

0x017[7:2]=000100,0x017[7:2]=000101,0x017[7:2]=000110 and 0x017[7:2]=101011,the pin all do not have any signal.So I donot know the condition of the on-chip VCO.

There are some errors in my operation maybe,I am pleased for your suggest.

  • HI,

    you need to do a VCO calibration if you want the PLL to function as you want.

    The PLL cannot lock if VCO is not calibrated. 

    Bottom line: calibrate the VCO first and then see the PLL locked. Then you can measure the output frequency.


  • Tranks for your reply,I always have a difficulty on VCO calibration.I want the output signal is 2GHz,and the configuration of the PLL are R=100; N=8000; charge pump is 4.8mA.I follow the steps in the datasheet,then I can read the readback bit(register 0x01F[6]) which is 1b.But after VCO calibration,the frequency of output signal is 2.450GHz.Here are my configurations of all the registers.

    0X0000; 0X24

    0X0232; 0X01

    0X0000; 0X81

    0X0010; 0X7C

    0X0011; 0X64        //R=100

    0X0014; 0XF4        //B=500

    0X0015; 0X01

    0X0016;0X05        //P=16


    0X001B; 0XE0

    0X001C; 0X17


    0X00F3; 0X04

    0X00F4; 0X04

    0X0192; 0X04

    0X0198; 0X04

    0X019B; 0X04

    0X0193; 0X00

    0X0194; 0X00

    0X0195; 0X02

    0X01E1; 0X02






     I am pleased for your suggest.

  • HI,

    sorry for the delay in getting back to you. We were in shutdown for the winter holidays.

    Could you please send me the schematic of the AD9520-3 board? I want to make sure you copied the evaluation board schematic on the required external circuitry that connects the CP pin to LF pin:


    I tried to replicate your configuration on the evaluation software using the settings you set above. Here is what I found:

     - register 0x1C is 0x17. You cannot set bits 2 and 1 to 1 together with bit 0 because setting bit 0 to 1 means the reference is differential, which means you have only one reference, not two. Also, it does not make sense to enable automatic switchover when you have only one reference. So this register should be set to 0x1.

    - register 0x193 is 0x0. This register can never be 0 because it contains the number of clock cycle minus 1 for the low/high cycles. It should be 1.


    I strongly recommend to use the evaluation software to configure the AD9520-3 as you desire and then save the configuration. The resultant file contains the register values that you will use to configure the chip on your board.