i'm planning to use ADF5610 for generating 7 to 9GHz(Variable), 8GHz, 10GHz, 12GHz.
Regarding ADF5610 Reference,
1)I'm using 50MHz sine wave for PLL Reference input generated form the 10MHz Master clock with the help of multiplier. how much dBc harmonic Rejection should required at the REF input port.
2)or shall i use sine to square conversion using LTC6957 chip directly from 10MHz master clock to 10MHz square wave as REF input.
3)i am using OCXO as reference @10KHz offset -175dBc phase noise. With this reference if i convert sine to square wave the phase noise floor @ 10KHz is raised to -160dBc and it is fixed for further offsets(Refer Below image). what ever the beter reference i give the LTC6957 chip raises the PN floor to -160dBc @ 10KHz offset