Ad9528 PLL1 is not locking with ZCU102 custom board.

Hi,

We are using ultrascale+ custom board. And we are trying to up the AD9371. Prior to that AD9528 should be up. SPI communication is OK and linux is showing the AD9528 device under iio.

But when we cat the PLL1 status it is not locked meanwhile PLL2 is locking. We are giving  single ended positive clock of122.88 to vco and ref A single ended negative of 15.32. But the PLL1 is not locking. what we are missing?

Here is our device tree.

                #address-cells = <0x1>;
                #size-cells = <0x0>;
                #clock-cells = <0x2>;
                compatible = "adi,ad9528";
                reg = <0x2>;
                spi-max-frequency = <0x989680>;
                clock-output-names = "ad9528-1_out0", "ad9528-1_out1", "ad9528-1_out2", "ad9528-1_out3", "ad9528-1_out4", "ad9528-1_out5", "ad9528-1_out6", "ad9528-1_out7", "ad9528-1_out8", "ad9528-1_out9", "ad9528-1_out10", "ad9528-1_out11", "ad9528-1_out12", "ad9528-1_out13";
                adi,vcxo-freq = <0x7530000>;
                adi,refa-enable;
                adi,refa-r-div = <0x1>;
                adi,refa-cmos-neg-inp-enable;
                /*adi,osc-in-cmos-neg-inp-enable;*/
                adi,pll1-feedback-div = <0x8>;
                adi,pll1-charge-pump-current-nA = <0x1388>;
                adi,pll2-vco-div-m1 = <0x3>;
                adi,pll2-n2-div = <0xa>;
                adi,pll2-r1-div = <0x1>;
                adi,pll2-charge-pump-current-nA = <0xc4888>;
                adi,sysref-src = <0x2>;
                adi,sysref-pattern-mode = <0x1>;
                adi,sysref-k-div = <0x200>;
                adi,sysref-request-enable;
                adi,sysref-nshot-mode = <0x3>;
                adi,sysref-request-trigger-mode = <0x0>;
                adi,rpole2 = <0x0>;
                adi,rzero = <0x7>;
                adi,cpole1 = <0x2>;
                adi,status-mon-pin0-function-select = <0x1>;
                adi,status-mon-pin1-function-select = <0x7>;
                reset-gpios = <&gpio 0x4a 0x0>;

                channel@13 {
                    reg = <0xd>;
                    adi,extended-name = "DEV_CLK";
                    adi,driver-mode = <0x0>;
                    adi,divider-phase = <0x0>;
                    adi,channel-divider = <0xa>;
                    adi,signal-source = <0x0>;
                };

                channel@1 {
                    reg = <0x1>;
                    adi,extended-name = "FMC_CLK";
                    adi,driver-mode = <0x0>;
                    adi,divider-phase = <0x0>;
                    adi,channel-divider = <0xa>;
                    adi,signal-source = <0x0>;
                };

                channel@12 {
                    reg = <0xc>;
                    adi,extended-name = "DEV_SYSREF";
                    adi,driver-mode = <0x0>;
                    adi,divider-phase = <0x0>;
                    adi,channel-divider = <0xa>;
                    adi,signal-source = <0x2>;
                };

                channel@3 {
                    reg = <0x3>;
                    adi,extended-name = "FMC_SYSREF";
                    adi,driver-mode = <0x0>;
                    adi,divider-phase = <0x0>;
                    adi,channel-divider = <0xa>;
                    adi,signal-source = <0x2>;
                };

  • 0
    •  Analog Employees 
    on Jan 17, 2019 8:07 AM over 1 year ago
    We are giving  single ended positive clock of122.88 to vco

    Please correct me if I'm wrong.

    You don't use a VCXO, but instead feeding a external clock source of 122.88MHz into VCXO_IN and then expect PLL1 to lock it's frequency against RefA?

    -Michael

  • Hi Michael,

    Typo mistake we are using CVHD-950X-122.880 VCXO and ad9528 pin 11 is connected to it our hardware pin 12(-ive IN) is ground. Comp out of vcxo is not in our design so we have  commented the entry "adi,osc-in-cmos-neg-inp-enable" from the device tree. The VCXO out is connected on pin 11 of Ad9528. And we are feeding refA "single ended clock".

  • 0
    •  Analog Employees 
    on Jan 17, 2019 10:37 AM over 1 year ago in reply to rajnish

    Can you read AD9528 registers 0x0508 and 0x0509?

    -Michael

  • The Readback it is printing 0xe6. Log spi read last address print in multibyte.

    [    2.970965] iio iio:device1: SPI Read in Setup
    [    2.975424] iio iio:device1: Write actual 0 0x0: 0x99
    [    2.980745] iio iio:device1: Write actual 1 0x1: 0x20
    [    2.985765] iio iio:device1: Write actual f 0xf: 0x1
    [    2.990975] iio iio:device1: Spi Read 0x5: 0xff05
    [    2.997618] iio iio:device1: SPI after Magic FF05
    [    3.002247] iio iio:device1: Write actual 101 0x100: 0x1
    [    3.009584] iio iio:device1: SPI after pll 0
    [    3.013785] iio iio:device1: Write actual 103 0x102: 0x1
    [    3.019104] iio iio:device1: SPI after pllb 0
    [    3.023419] iio iio:device1: Write actual 105 0x104: 0x8
    [    3.028739] iio iio:device1: SPI after feedback 0
    [    3.033404] iio iio:device1: Write actual 107 0x106: 0x130a
    [    3.039033] iio iio:device1: Write actual 10a 0x108: 0x880508
    [    3.046788] iio iio:device1: Write actual 200 0x200: 0xe6
    [    3.052783] iio iio:device1: SPI after AD9528_PLL2_CHARGE_PUMP 0
    [    3.058720] iio iio:device1: Write actual 201 0x201: 0x87
    [    3.064126] iio iio:device1: Write actual 202 0x202: 0x3
    [    3.069419] iio iio:device1: Write actual 203 0x203: 0x0
    [    3.074707] iio iio:device1: Write actual 204 0x204: 0x3
    [    3.080005] iio iio:device1: Write actual 207 0x207: 0x1
    [    3.085300] iio iio:device1: Write actual 208 0x208: 0x9
    [    3.090599] iio iio:device1: Write actual 206 0x205: 0x3a
    [    3.095985] iio iio:device1: SPI before channel 0
    [    3.100641] iio iio:device1: Write actual 329 0x327: 0x90000
    [    3.106318] iio iio:device1: Write actual 305 0x303: 0x90000
    [    3.111961] iio iio:device1: Write actual 326 0x324: 0x90040
    [    3.117602] iio iio:device1: Write actual 30b 0x309: 0x90040
    [    3.123243] iio iio:device1: Write actual 502 0x501: 0xff5
    [    3.128718] iio iio:device1: Write actual 32c 0x32b: 0x0
    [    3.134003] iio iio:device1: Write actual 401 0x400: 0x200
    [    3.139473] iio iio:device1: Write actual 403 0x402: 0x9680
    [    3.145028] iio iio:device1: Write actual 500 0x500: 0x10
    [    3.150406] iio iio:device1: Write actual f 0xf: 0x1
    [    3.155357] iio iio:device1: Write actual 203 0x203: 0x1
    [    3.156534] mmc0: new high speed SDHC card at address aaaa
    [    3.156820] mmcblk0: mmc0:aaaa SU32G 29.7 GiB
    [    3.170541] iio iio:device1: Write actual f 0xf: 0x1
    [    3.170566]  mmcblk0: p1 p2
    [    3.178261] iio iio:device1: SPI after io update 0
    [    3.183043] iio iio:device1: Spi Read 0x509: 0xe6
    [    3.187695] iio iio:device1: Write actual 403 0x402: 0x9780
    [    3.193281] iio iio:device1: Write actual 505 0x505: 0x1
    [    3.198575] iio iio:device1: Write actual 506 0x506: 0x7
    [    3.203868] iio iio:device1: Write actual 507 0x507: 0xc
    [    3.209166] iio iio:device1: Write actual f 0xf: 0x1
    [    3.214111] iio iio:device1: Write actual 32a 0x32a: 0x1
    [    3.219407] iio iio:device1: Write actual f 0xf: 0x1
    [    3.224355] iio iio:device1: Write actual 32a 0x32a: 0x0
    [    3.229649] iio iio:device1: Write actual f 0xf: 0x1
    [    3.234626] iio iio:device1: Spi Read 0x509: 0xe4
    [    3.248750] iio iio:device1: Spi Read 0x509: 0xe6
    [    3.253378] iio iio:device1: SPI after sync 0
    [    3.257862] iio iio:device1: Spi Read 0x329: 0x90000
    [    3.262935] iio iio:device1: Spi Read 0x305: 0x90000
    [    3.267996] iio iio:device1: Spi Read 0x326: 0x90040
    [    3.273051] iio iio:device1: Spi Read 0x30b: 0x90040

  • 0
    •  Analog Employees 
    on Jan 17, 2019 11:15 AM over 1 year ago in reply to rajnish

    What about 0x508 ?

    If everything goes well it should read 0xe7.

    root@analog:~# iio_reg ad9528-1 0x508
    0xe7

    -Michael