some questions about ADCLK948. Input is 200MHZ LVDS, 7 LVPECL outputss.
1. We use LVDS input AC coupled to ADCL948 on CLK0 diffrential inputs according to figure21 in datasheet. How should we deal with UNUSED inputs(CLK1, VREF1, VT1) and UNUSED outputs?
2. How should we choose the bypassing capacitor value on VREF0 ?
3. How should we choose the input AC coupling capacitors value?
Thanks. Happy New Year!
Can you please suggest what should be done with the unused output clocks?
In my design I have left Q5 & Q5# un-connected. Remaining outputs are used.
If this is a mistake and will the…
hi If you coma back from holiday, anyone help comfim on this? Thanks.
If this is a mistake and will the other outputs get distorted due to this?