ADCLK948 unused input/output pin question

hi If you coma back from holiday,  anyone help comfim on this? Thanks. 

Hi,

1. As the figure 21 shows, internally, the CLKx pins are tied to VTx through 50ohm resistors. So if CLK1 and CLK1B are not used, I propose to left them unconnected, tie VT1 to VREF1 and put 0.1uF capacitors on VT1 and VREF1 pins (as the evaluation board has).
2. I propose to use the VREF0 bypassing capacitor value used in the evaluation board, which is 0.1uF. The chip characteristics given in the data sheet have been measured on a similar circuit, so this value ensures the chip functions as stated.
3. Please use the ac coupling capacitors used in the evaluation board, that is 0.1uF. As the data sheet states an ac output max frequency (which means a max input frequency as well) of 4.8GHz typical, it means the ac coupling capacitors used in the evaluation board function well over the range.

Best regards

Petre

Thanks, Petre.

Hello Petre,

Can you please suggest what should be done with the unused output clocks?

In my design I have left Q5 & Q5# un-connected. Remaining outputs are used.

If this is a mistake and will the other outputs get distorted due to this?