Post Go back to editing

Help with LTC6957-3 singal integrity question!

Hello,

I have a few questions regarding signal integrity. 

1. I'm planning on using the LT6957-3 part in a design for a diode driver.  The diode driver is the LMG1020 and is driven directly from the LTC6957-3 output.  The length of the trace is roughly 0.6" (inches).  The rise time for the 6957-3 is 320pS. We are trying to send a 1-2nS pulse through this part (powered with a Vcc=3.3V). Since this output is CMOS logic how do you properly handle this 0.6" track length regarding terminations etc....for best signal integrity?  

2. With this length is the signal degradation a large issue?

3. Is there any way to check this in LTspice? 

4. Can you convert an IBIS model to a spice model for use in LTspice?

4a. if so - how and/or where is documentation explaining this?

Thank you for any response/advice!

  • LTSpice has a generic transmission line component called Tline, shown below.   The feature allows you to program the delay of your 0.6" transmission line.  For a quick calculation to determine the delay I would assume 6ps/mm delay, this calculates to 91.4ps delay for 0.6" trace (6ps/mm * 25.4 mm/in * 0.6in = 91.4ps).   For initial simulations I would recommend using the independent voltage source shown below.  Set this up to mimic 0 to 3.3V 320ps pulse out of the LTC6957  driving the transmission line with some termination series and termination impedance (example schematics shown below with LTC6954 output -similar CMOS output to LTC6957).  Remember CMOS outputs typically have around 33ohms internal series resistance (similar to LTC6957 CMOS output), this resistance can be included in the independent voltage source as shown below.  Let me know if this helps to get you started or I misunderstood what you were asking for. 

    I don't know how to convert IBIS to a LTSpice model.