Team, customer has the following questions.
PK: This is a good choice if you need that many outputs. There should be no issue setting the loop BW at 1 MHz, although I'd need my colleague who is an HMC7044 expert to confirm. I know that a 400 kHz loop BW for PLL2 is achievable.
This jitter requirement can be translated into a time interval which is 10/Fout, and once you determine that, you can determine how much of the close-in phase noise you can ignore.
The Agilent E5052B has the ability to make these measurements, and I'm quite sure it's the piece of equipment we used.
It's been years since we've done that, but I can say with high certainty that the E5052 was used, and it's a real-time measurement, although it's a trigger, measure, display type of operation. It's real-time, but only updates about every second.
I hope this helps.
HMC7044 is being used with a PLL2 LBW of 600kHz-700kHz in the eval board. A wider BW was not tested before, but 1MHz is achievable - that is possible.
My concern is, HMC7044 includes a multiband VCO with two VCO cores. Normally VCO bands are wide enough to cover the mentioned range but it is difficult to guarantee it over temperature.
Another point is; with such a wide LBW, all PLL noise will contribute to overall performance. Normally in a jitter attenuator configuration, LBW is designed to be very narrow to have high performance by eliminating PLL and reference noise and by using the advantage of very low noise, low BW VCO (namely VCXO). The overall noise performance probably will be still OK, but needs a careful design with this in mind.