Important: For full functionality of this site it is necessary to enable JavaScript. Here are the instructions how to enable JavaScript in your web browser.

Clock and Timing

Clock and Timing requires membership for participation - click to join

Recent Content Q&A

Not Answered

The output of AD9542 contains harmonics of 122.88MHz 0

2 views

0 replies

on Aug 10 2022 by aarontang
Not Answered

AD9523-1 Power-up error 0

32 views

3 replies

on Aug 9 2022 by gabay
Not Answered

When AD9542 sets Mx as the PLL lock status indicator, ACE reports an error 0

7 views

0 replies

on Aug 9 2022 by aarontang
Not Answered

ADF4372 SCLK Falling Edge to Data Out (Muxout) Valid Delay (Taccess) 0

36 views

1 reply

on Aug 8 2022 by lithelycanthrope
Not Answered

AD9542 Eval Board I2C jumper settings 0

149 views

6 replies

on Aug 8 2022 by slasch
Not Answered

ADN2905: NC pins are working... Can ADN2905 be used for clock recovery? 0

11 views

0 replies

on Aug 8 2022 by ytaku101
Answered

Output shape issue with AD9542 0

65 views

3 replies

on Aug 3 2022 by abaks
Answered

AD9528: Does PLL1 really need to be locked when PLL2 is in Locked State ? 0

119 views

8 replies

on Aug 2 2022 by MKS3134
Not Answered

AD9575 input - crystal only or LVCMOS compatible? 0

15 views

1 reply
on Aug 1 2022
by pminc48
Not Answered

Clock Buffers and Drivers product line VOUT+ 0

63 views

6 replies

on Jul 31 2022 by MahmoudElsayed

Answered Questions

Answered

Output shape issue with AD9542 0

65 views

3 replies

on Aug 3 2022 by abaks
Answered

AD9528: Does PLL1 really need to be locked when PLL2 is in Locked State ? 0

119 views

8 replies

on Aug 2 2022 by MKS3134
Answered

LTC6993-1 internal short from Output pin to Div pin 0

60 views

1 reply
on Jul 19 2022
by Doug LaPorte
Answered

AD9576 PLL0 & PLL1 sync 0

56 views

1 reply
on Jul 18 2022
by pminc48
Answered

HMC7044-Noise Floor Calculation +1

62 views

1 reply
on Jul 18 2022
by kudret.unal

Recent Activity