DEMO-AD5700D2Z HART_CLK connection


This is regarding DEMO-AD5700D2Z board. I just started programming and evaluate the performance of the ICs in-order to zero in on them. I see that HART_CLK is connected to both P2.0 and P1.0. Can someone please explain me what is the reason to connect to two pins?

Also, on a custom board, I want to connect HART_CLK to just P1.0 as I want to use P2.0 and P2.1 as I2C lines. Is it feasible?



ad5700 ad5700-1 hart demo-ad5700d2z

No Data
  • Hi Spoorthy,

    To clarifiy the HART_CLK signal on P1.0 and P2.0. These can potentially be used as clock input to provide synchronization/calibration of the ADuCM360 timing by the AD5700 clock.

    In the demo application, these were not used because the AD5700 crystal oscillator and the ADuCM360 internal clock were already accurate enough for the application.

    P2.0 can be used as clock input for UART clock

    P1.0 can ba an interrupt source for the Timer 0 and Timer 1

    That is why the pins were connected. Hope this answers your question.



No Data