CN0371 Questions


I'm testing CN0371 reference design with E200 LVDT. But so far I'm not able to get as good linearity as shown in the note.

What are the settings used in your test/software?

Here are my register settings:
Mode register (0x08), value 0x0C0001
Configuration register (0x10), value 0x000100

Clock Configuration register (0x002B) value 0x06

A few more questions about ADA2200:
1. Should I write 1 to clock source select bit in Analog Pin Configuration register (0x0028) as clock signal is from AD7192 via CLKIN pin? But setting 1 to this bit stops the circuit from working in my test.
2. What should I use for VOCM select in Demod Control register (0x002A)?
3. For SDO active bit in Serial Interface register (0x0000), table 11 says "1 = SDIO operates as an input only. The SDO signal is active." But on page 19, it says "The default is Logic 0, configuring the SDIO/SDA pin as unidirectional.” Isn’t it controdictory?
4. I was testing connection with this chip alone. I wrote 00011000 to Serial Interface register (0x0000), then wrote 00010000 to Demod Control register (0x002A), then tried to read the default value of Clock Configuration register (0x802B), but I wasn’t able to get the default reading 0x02. Did I miss anything?