I have been studying the layout of the CN0326 reference design, and I wanted to clarify the ground layout
Top layer DGND pour
Bottom layer DGND pour
So I have uploaded two screenshots the first screenshot is of Top layer DGND pour in which I have used highlight too in the OrCAD PCB designer and I have circled the text which says that highlighted net area belongs to DGND and I have also circled the layer under the visibility tab on the left side and I have done similar thing for the second screenshot which of bottom layer.
My question is why was DGND was poured on top as well as the bottom layer of the PCB and traces were passed throguh the DGND layer on both top and bottom layer, whereas to just pouring only the bottom layer with DGND and connecting the top layer componets and traces to DCND with vias. I also observed similar techquie executed for the isloated part of the PCB in which AGND was poured on top as well as bottom layer and then traces were connected through the pour.
I would like to understand the reason why do we do that and what are the consequences of not following the practice if that is what the designer has done, please correct me if I had got anything wrong with my understanding.
The isolation chips (ADuMxxxx) have some very high internal switching frequencies and therefore require additional considerations when it comes to proper grounding techniques. When designing the CN0326, we spoke with the isolator team and they recommended flooding both plans with GND to ensure a very short, low impedance path for the current to go.
Thanks a lot, Brandon for clearing out the query.
I had one more question regarding the same reference design, as you can see in the uploaded screenshot that an inductor of value 330ohm is used between GND_ISO and AGND, where GND_ISO is connected to the isolation chips (ADuMxxxx) with the said inductor via a track and then inductor is connected to ground pour of AGND. Can you please shed some light on that part too. Thank you.
E1 is the ferrite bead which has similar properties to an inductor with some slight differences, so i encourage you to read up on them at a later time. Again this is good practice when dealing with high frequency switching noise, the ferrite provides a common GND connection which is needed in the circuitry but with the added benefit of filtering out the switching noise. It gets a lot more technical that but that is the general premise.