############################################################################### ## Copyright (C) 2020-2023, 2025 Analog Devices, Inc. All rights reserved. ### SPDX short identifier: ADIBSD ############################################################################### set_property -dict {PACKAGE_PIN E5 IOSTANDARD LVCMOS18} [get_ports dev_clk_in] ; #FMC_HPC0_CLK0_M2C_P set_property -dict {PACKAGE_PIN E8 IOSTANDARD LVDS} [get_ports dev_mcs_fpga_out_n] ; #FMC_HPC0_LA14_N set_property -dict {PACKAGE_PIN F8 IOSTANDARD LVDS} [get_ports dev_mcs_fpga_out_p] ; #FMC_HPC0_LA14_P set_property -dict {PACKAGE_PIN F7 IOSTANDARD LVCMOS18} [get_ports dgpio_0] ; #FMC_HPC0_LA16_P set_property -dict {PACKAGE_PIN G8 IOSTANDARD LVCMOS18} [get_ports dgpio_1] ; #FMC_HPC0_LA16_N set_property -dict {PACKAGE_PIN E9 IOSTANDARD LVCMOS18} [get_ports dgpio_2] ; #FMC_HPC0_LA15_N set_property -dict {PACKAGE_PIN F2 IOSTANDARD LVCMOS18} [get_ports dgpio_3] ; #FMC_HPC0_LA11_N set_property -dict {PACKAGE_PIN A8 IOSTANDARD LVCMOS18} [get_ports dgpio_4] ; #FMC_HPC0_LA09_N set_property -dict {PACKAGE_PIN C9 IOSTANDARD LVCMOS18} [get_ports dgpio_5] ; #FMC_HPC0_LA10_N set_property -dict {PACKAGE_PIN AE2 IOSTANDARD LVCMOS18} [get_ports dgpio_6] ; #FMC_HPC0_LA27_P set_property -dict {PACKAGE_PIN AG6 IOSTANDARD LVCMOS18} [get_ports dgpio_7] ; #FMC_HPC0_LA26_P set_property -dict {PACKAGE_PIN AC7 IOSTANDARD LVCMOS18} [get_ports dgpio_8] ; #FMC_HPC0_LA28_P set_property -dict {PACKAGE_PIN AB7 IOSTANDARD LVCMOS18} [get_ports dgpio_9] ; #FMC_HPC0_LA28_N set_property -dict {PACKAGE_PIN E2 IOSTANDARD LVCMOS18} [get_ports dgpio_10] ; #FMC_HPC0_LA11_P set_property -dict {PACKAGE_PIN AF2 IOSTANDARD LVCMOS18} [get_ports dgpio_11] ; #FMC_HPC0_LA27_N ## NOTE: Board-level P/N swap for fpga_mcs_in; HDL inverts after IBUFDS. set_property -dict {PACKAGE_PIN AG9 IOSTANDARD LVDS DIFF_TERM_ADV TERM_100} [get_ports fpga_mcs_in_n] ; #FMC_HPC0_LA32_N set_property -dict {PACKAGE_PIN AH9 IOSTANDARD LVDS DIFF_TERM_ADV TERM_100} [get_ports fpga_mcs_in_p] ; #FMC_HPC0_LA32_P set_property -dict {PACKAGE_PIN D6 IOSTANDARD LVDS DIFF_TERM_ADV TERM_100} [get_ports fpga_ref_clk_n] ; #FMC_HPC0_CLK1_M2C_N set_property -dict {PACKAGE_PIN D7 IOSTANDARD LVDS DIFF_TERM_ADV TERM_100} [get_ports fpga_ref_clk_p] ; #FMC_HPC0_CLK1_M2C_P set_property -dict {PACKAGE_PIN AH8 IOSTANDARD LVCMOS18} [get_ports gp_int] ; #FMC_HPC0_LA30_P set_property -dict {PACKAGE_PIN F6 IOSTANDARD LVCMOS18} [get_ports mode] ; #FMC_HPC0_LA13_P set_property -dict {PACKAGE_PIN G6 IOSTANDARD LVCMOS18} [get_ports reset_trx] ; #FMC_HPC0_LA13_N set_property -dict {PACKAGE_PIN B9 IOSTANDARD LVCMOS18} [get_ports rx1_enable] ; #FMC_HPC0_LA10_P set_property -dict {PACKAGE_PIN AG5 IOSTANDARD LVCMOS18} [get_ports rx2_enable] ; #FMC_HPC0_LA26_N set_property -dict {PACKAGE_PIN D5 IOSTANDARD LVCMOS18} [get_ports sm_fan_tach] ; #FMC_HPC0_CLK0_M2C_N set_property -dict {PACKAGE_PIN E3 IOSTANDARD LVCMOS18} [get_ports spi_clk] ; #FMC_HPC0_LA12_P set_property -dict {PACKAGE_PIN AB6 IOSTANDARD LVCMOS18} [get_ports spi_dio] ; #FMC_HPC0_LA29_N set_property -dict {PACKAGE_PIN E4 IOSTANDARD LVCMOS18} [get_ports spi_do] ; #FMC_HPC0_LA12_N set_property -dict {PACKAGE_PIN D9 IOSTANDARD LVCMOS18} [get_ports spi_en] ; #FMC_HPC0_LA15_P set_property -dict {PACKAGE_PIN A9 IOSTANDARD LVCMOS18} [get_ports tx1_enable] ; #FMC_HPC0_LA09_P set_property -dict {PACKAGE_PIN AC6 IOSTANDARD LVCMOS18} [get_ports tx2_enable] ; #FMC_HPC0_LA29_P set_property -dict {PACKAGE_PIN AE7 IOSTANDARD LVCMOS18} [get_ports vadj_err] ; #FMC_HPC0_LA31_P set_property -dict {PACKAGE_PIN AD7 IOSTANDARD LVCMOS18} [get_ports platform_status] ; #FMC_HPC0_LA31_N set_property UNAVAILABLE_DURING_CALIBRATION TRUE [get_ports tx1_strobe_out_p] set_property UNAVAILABLE_DURING_CALIBRATION TRUE [get_ports tx1_strobe_out_n] set_property PACKAGE_PIN H1 [get_ports IIC_CPLD_scl_io] set_property PACKAGE_PIN J1 [get_ports IIC_CPLD_sda_io] set_property IOSTANDARD LVCMOS18 [get_ports IIC_CPLD_scl_io] set_property IOSTANDARD LVCMOS18 [get_ports IIC_CPLD_sda_io] set_property PULLTYPE PULLUP [get_ports [list IIC_CPLD_scl_io]] set_property PULLTYPE PULLUP [get_ports [list IIC_CPLD_sda_io]]