According to ADV7343 datasheet, the external loop filter looks like Fig. 92 (p.73).
The questions are;
1. What kinds of side-effect would occurr if the 150nF capacitor value would be changed between -20% (120nF)~+80% (270nF?) in the worst case?
2. How much margin would be permitted in this capacitor, from design point of view?
As for Q1, since it determines the filter characteristics, I assume the noise or something would be appeared in the picture in the worst case.
Message was edited by: Andy to correct part number from ADV7240 to ADV7402
message edit by HankZ 05/17/10 to correct part number to ADV7343 and correct page number for Fig.92
These components are normally allowed have up to ±10% tolerance.
However, the 150nF capacitor can have ±15% tolerance if R has ±0.5% and 12nF cap has ±2.5% tolerance
This filter adds one pole and one zero into the PLL loop transfer function and not satisfying tolerances will make loop unstable and picture may show more noise
Message edited 05/17/10 by HankZ to correct part number