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The LTC2185 is a 125Msps 16-bit ADC with excellent noise and linearity performance while only consuming 185mW per channel. It is ideal for demanding low power applications that require excellent AC performance. A high performance ADC like the LTC2185 requires a high performance amplifier driving it to maintain the excellent performance. The ADA4927-1 delivers the linearity performance required by the LTC2185 while only consuming 215mW. The well designed package of the ADA4927-1 allows for a simple layout that reduces parasitic capacitance in the feedback path that can erode the phase margin of the amplifier. This combination of ADC and driver allows excellent performance from 62.5-125MHz a region where other high speed amplifiers are lacking. 

 

The LTC2185 is a two-channel simultaneous sampling parallel ADC which offers a choice of full-rate CMOS, or double data rate (DDR) CMOS/LVDS digital outputs. Pin-compatible speed grade options include 25Msps, 40Msps, 65Msps, 80Msps and 105Msps with approximate power dissipation of just 1.5mW/Msps per channel. It includes popular features such as the digital output randomizer and alternate bit polarity (ABP) mode that minimize digital feedback when using parallel CMOS outputs.  Analog full power bandwidth of 550MHz and ultralow jitter of 0.07psRMS allows under-sampling of IF frequencies with excellent noise performance. To maintain this level of performance the LTC2185 needs to be driven with an appropriate amplifier like the ADA4927-1.

 

The ADA4927 is a high speed differential current feedback amplifier. Fabricated on Analog Devices’ silicon-germanium process, the ADA4927-1 has excellent distortion and an input voltage noise of only 1.3nV/rtHz. This allows it to drive high speed ADCs like the LTC2185. The gain of the ADA4927-1 is set with external feedback resistors located next to the input pins.  By keeping the feedback pins and input pins close on the package, the ADA4927-1 provides a clean layout and minimizing the parasitic capacitance in the feedback network. This make the ADA4927-1 an ideal choice for driving high performance ADCs, like the LTC2185, from DC to 125 MHz.

 

Figure 1 shows a schematic of the ADA4927-1 driving the LTC2185. The corresponding layout is shown in figure 2.  The feedback pins on the ADA4927-1 are adjacent to the input pins which minimizes the parasitic capacitance of the feedback node and improves the phase margin of the amplifier. It also Simplifier the layout by making it possible to place feedback resistors directly across the two pins and not having additional trace length in the feedback path. There is a simple filter between the amplifier and ADC that reduces the wideband noise of the amplifier and improves the SNR of the system. This filter also attenuates the sampling glitches from the ADC before they reach the amplifier. This helps keep the output network of the ADA4927 from oscillating in response to these glitches. This filter network can be modified to accommodate a wide range of input bandwidth requirements.

Figure 1:  Schematic showing an ADA4927-1 driving one channel of the LTC2185

 

Figure 2:  Layout showing an ADA4927-1 driving once channel of the LTC2185

 

Figure 3 and figure 4 show the SNR and SFDR of the LTC2185 and ADA4927-1 combination. The SFDR stays above 67dB out to 125MHz while the SNR is better than 63dB to the same frequency. This combination only consumes 250mW. With a sample rate of 125Msps, this combination provides good performance through the entire 2nd Nyquist zone where other amplifiers begin to have poor linearity. 

 

Figure 3:  SNR of the LTC2185 driven with the ADA4927-1

Figure 4:  SFDR of the LTC2185 driven with the ADA4927-1

 

Using the ADA4927-1 to drive the LTC2185 provides excellent linearity while keeping the power consumption low. The fact that the ADA4927-1 stays very linear out to 125MHz allows this ADC amplifier combination to be used in demanding communication and medical applications that require the use of the second Nyquist zone of the LTC2185. The pin out of the ADA4927-1 and filter design minimize the complexity of the layout while maintaining excellent performance on a low power budget.

 

Follow the EngineerZone Spotlight to know when the next Combo Circuits From the Lab blog is posted.

tnelson654

Unplug and Go Ride a Bike

Posted by tnelson654 Employee May 11, 2017

 

On our website, it says:

Solving the problems of tomorrow and today relies on intelligently bridging the digital and analog worlds. At Analog Devices, we create unmatched technologies and solutions to solve our customers’ problems.

Forgive the hyperbole, but our customers' problems are the world's problems. And I'm very proud of the fact that the technologies we create have a big impact on solving the world's problems. But sometimes, the intelligent thing to do is to leave technology out. Just unplug. Go off the grid and go ride a bike.


I have a nice little home out in the suburbs with solar panels on the roof and a hybrid in the garage. But the price I pay for it is a 25-mile commute that can sometimes take over an hour. Imagine four lanes of stop-and-go highway traffic, mostly stopped. No amount of navigation assistance, multi-zone air conditioning or fuel-mapping optimization is going to make the situation any better. So, five years ago on "Bike to Work Day" I decided to try commuting all the way to work and back on my bike. Navigation was by sight and memory, air conditioning was the wind in my face and fuel mapping was a granola bar. And with that, I was hooked!

Erik Soule and Todd Nelson in Milpitas
I ride almost every day now. But "Bike to Work Day" is always special because it is a time to help my co-workers who think it might be possible for them to maybe just ride once. May 11, 2017, is Bike to Work Day in the Bay area and I'm hoping to add a few more people to our commuter group. The community sprinkles "energizer stations" on all the popular bike-commuting routes and gives out snacks, energy bars, coupons and some even serve coffee and warm breakfast. It's a happening! We aren't really talking about how we aren't burning fossil fuels or emitting CO2. We aren't talking about how we are freeing up traffic and parking spots for those who drive. We aren't talking about the health benefits. We are simply talking about how much fun it is.

 

Bill Skirkey in Chelmsford
We are just happy to ride.

(It's nice to know it's part of the solution, too.)

 

May is National Bike Month and cities around the United States are designating a Bike to Work day. If you bike to work, tell us about it on Twitter. #BikeToWorkDay @ADI_News

clon

High Precision Voltage Source

Posted by clon Employee May 9, 2017

Today in our Combo Circuit from the Lab series, we are showcasing an ultra-high precision programmable voltage using ADI/LTC products together. The AD5971 with the LTZ1000, ADA4077 and AD8675/6 can be used to provide a programmable voltage source that achieves 1PPM resolution with 1PPM INL and better than 1PPM FSR long-term drift. This powerful combination helps provide radiologists with the superior image clarity, resolution and contrast they need, enabling them to see smaller anatomical structures. Just think of what this means when applied to an MRI (magnetic resonance imaging). Enhanced imagery of organs and soft tissues will allow medical professionals to more accurately detect heart problems, tumors, cysts and abnormalities in various parts of the body. This is just one of many applications for this programmable voltage source. 

 

 

Other applications that require 1ppm of accuracy are:

  • Scientific Medical and Aerospace Instrumentation
    • Medical Imaging Systems
    • Laser Beam Positioners
    • Vibration Systems.
  • Test and Measurement
    • ATE
    • Mass Spectrometry
    • Source-Measure Units (SMU)
    • Data Acquisition / Analysers
  • Industrial Automation
    • Semiconductor Manufacturing
    • Process Automation
    • Power Supply Control
    • Advanced Robotics

 

For Test and Measurements Systems, the 1ppm resolution and accuracy improves overall test equipment accuracy and granularity,  leading to finer control and excitation of external sources and nano-Actuators. In Industrial Automation, the 1ppm resolution and accuracy provides the precision that is required to move, alter or position an actuator on a nano-scale.

 

 

AD5791

The AD5791 is a 20-bit, unbuffered voltage output digital to analog converter with 1 ppm relative accuracy (1 LSB INL) and 1 LSB DNL (guaranteed monotonic). It has an impressive 0.05-ppm/°C temperature drift, 0.1 ppm p-p noise and better than 1-ppm long-term stability. The AD5791 contains a precision R-2R  architecture which exploits state of the art thin-film resistor-matching techniques.  It operates from a bipolar supply up to 33V,  it can be driven by a positive reference in the range of 5V to VDD-2.5V and a negative reference in the range of VSS + 2.5 V to 0 V. The AD5791 uses a versatile 3-wire serial interface that operates at clock rates up to 35 MHz and that is compatible with standard SPI, QSPI™, MICROWIRE™, and DSP interface standards. The AD5791 is offered in a 20 lead TSSOP package.

LTZ1000

The LTZ1000 is a ultra-stable temperature controllable reference. It provides a 7V output with an impressive 1.2µVP-P of noise, long-term stability of 2µV/√kHr and temperature drifts of 0.05ppm/°C. The part contains a buried zener reference, a heater resistor for temperature stabilization and a temperature sensing transistor. External components are used to set operating currents and to temperature stabilize the reference - this allows maximum flexibility and best long-term stability and noise.

ADA4077

The ADA4077 is a high precision, low noise operational amplifier with a combination of extremely low offset voltage and very low input bias currents. Unlike JFET amplifiers, the low bias and offset currents are relatively insensitive to ambient temperatures, even up to 125°C. Outputs are stable with capacitive loads of more than 1000 pF with no external compensation.

 

AD8675/AD8676

The AD8675/AD8676 are precision rail to rail operational amplifier with ultralow offset, drift, and voltage noise combined with very low input bias currents over the full operating temperature range.

 

Some Circuit Considerations:

Noise

Low-frequency noise must be kept to a minimum to avoid impact on the DC performance of the circuit. In the 0.1-Hz to 10-Hz bandwidth the AD5791 generates about 0.6μVp-p noise, each ADA4077 will generate 0.25μVp-p noise, the AD8675 will generate 0.1μVp-p  noise and the LTZ1000 generates 1.2µVp-p noise.  Resistor values were chosen to ensure that their Johnson noise will not significantly add to the total noise level.

 

AD5791 Reference buffer configuration

The reference buffers used to drive the REFP and REFN pins of the AD5791 must be configured in unity gain. Any extra currents flowing through a gain setting resistor into the reference sense pins will degrade the accuracy of the DAC.

 

AD5791 INL Sensitivity

The AD5791 INL performance is marginally sensitive to the input bias current of the amplifiers used as reference buffers, for this reason amplifiers with low input bias currents were chosen.

 

 

Temperature Drift

To maintain a low temperature drift coefficient for the entire system the individual components chosen must have low temperature drift. The AD5791 has a TC of 0.05ppm FSR/°C, the LTZ1000 offers a TC of 0.05ppm/°C , the ADA4077’s and the AD8675 contribute 0.005ppm FSR/°C and 0.01ppm FSR/°C respectively.

 

Long Term Drift

Long term drift is another important parameter that can cause significant accuracy limitations in systems. Long-term stability for the AD5791 is typically better than 0.1ppm/1000 hours at 125°C. Long-term stability on the order of 1µV per month can be achieved with the LTZ1000.

Lab Results:

INL Error was measured at ambient temperature in the lab by  varying the input code to the AD5791 from zero-scale to full-scale with a  code steps of 5. The voltage at the output of the output buffer (AD8675) was recorded at each code using a 8.5 digit DVM. The results are well within the ±1LSB specification.

 

Noise:

The noise measured at mid-scale was 1.1µV p-p and the noise measured at full scale was 3.7uV p-p. The noise contribution from each voltage reference path is attenuated by the DAC when mid-scale code is selected, hence the lower noise figure for mid-scale code.

 

Long Term Drift:

The system Long term drift was measured at 25Deg°C. The AD5791 was programmed to +5V (3/4 scale) and the output voltage was measured every 30minutes over a period of 1000 hours. Drift values less than 1ppm FSR were observed.

 

Conclusion:

In addition to ease of use the  AD5791 offers a guaranteed 1ppm accuracy, however selecting the correct components and voltage reference is critical to capitalise on the precision specifications of the AD5791. The low noise, low temperature drift, low long-term drift and high precision of the LTZ1000, ADA4077, AD8676 and the AD8675 improves the system precision, stability and repeatability over temperature and time.

 

JLKeip

DDS vs. PLL (round 2)

Posted by JLKeip Employee May 4, 2017

20 years ago I used to listen to Paul Harvey on the radio from time to time. He was known for delving deeper into news stories than many other reporters would. I enjoyed that. I hadn't thought of him for a while, but as I was writing this, I could hear him and his signature phrase reverberating in my mind: 'And that... is the rest of the story'. So here is the rest of the story on the nuances of the advantages PLL typically has over DDS.

 

Power Consumption -

This amount of advantage for a PLL depends greatly on the frequency range you wish to synthesize. DDS has so much digital content that as you push up the sample rate, you significantly increase the power consumption, and you need higher sample rates to hit higher output frequencies. If your frequency set is sub 100 MHz or so, the power comparison gets quite competitive:  There exists a DDS with a top speed of 250 MSPS which consumes on the order of 50 mW (AD9913), so the gap between DDS and PLL here is not necessarily large. 

As process geometries shrink, the power gap will also shrink.

 

Price -

A price difference certainly exists. This gap can also shrink with geometries, but it can also shrink due to economies of scale.  PLLs are much more broadly used and drive much higher volumes, which helps cost structures.  If you are looking at a high volume application, and a DDS solution yields some advantage, you should expect to find some room for negotiation on the price point.

 

Broad Spectral Purity -

If you need a fractional N PLL, you'll see the gap shrink some, but it won't disappear entirely. An interesting note (exhibited below) regarding Programmable Modulus DDS's - if you utilize lower integer values in the denominator of your frequency equation, you will see the spurs significantly converge, greatly reducing the number of spurs. At its root, the dilemma is choosing between broad spectral purity and tuning resolution.

 

300 MHz output from a 2.1 GHz sample rate (Programmable Modulus)~299 MHz output from a 2.1 GHZ sample rate Non-Programmable Modulus DDS

 

Both of these plots use a DDS (AD9915 to be specific) running at 2.1 GSPS. The image on the left has the output set to 300 MHZ (exactly 1/7th the sample rate), whereas the image on the right is programmed to ~299 MHz. The reduction in the number of spurs is dramatic isn't it?

 

Ancillary Circuitry -

Not a whole lot to say here.  PLLs which rely on external VCOs (as many higher performance ones do), and those with external loop filters will also require a fair bit of board space beyond their footprint, but there isn't much to be done about the reconstruction filter component needs of the DDS.  I have seen a design or two which was able to use the raw output signal, but they are certainly in the minority.

 

Frequency Upconversion -

While upconversion is still not a word (no matter how hard I lobby), I still use it! There are two ways to bridge this gap.  One is to work with a Super Nyquist image frequency from the DDS rather than the fundamental.  Doing so reduces the output power of the signal, and it also makes the filter design more complex - a band pass filter must be designed as opposed to a low pass filter.

The other approach is to use a hybrid DDS/PLL based approach, which has the effect of mixing the advantages I have discussed:

Hopefully this gives you all the knowledge you need to make an informed decision on which route to go the next time you need to synthesize a signal for any need you come across.  I encourage you to ask questions here or in the DDS or RF-PLL forums of the Engineer Zone.   You'll also find sortable lists of our PLL and DDS portfolios at the analog.com website.

KrisLokere

Wireless Current Sense

Posted by KrisLokere Employee May 2, 2017

Continuing with our series, Combo Circuits from the Lab, join Kris Lokere as he tells us what exactly makes Wireless Current Sense.

Measuring the current that flows through a sense resistor seems easy. Amplify the voltage, read it with an ADC, and now you know what the current is. But it gets more difficult if the sense resistor itself sits at a voltage that is very different from system ground. Typical solutions bridge that voltage difference in either the analog or digital domain. But here is a different approach – wireless.

Analog current sense ICs are compact solutions, but the voltage difference that they can withstand is limited by semiconductor processes. It is difficult to find devices that are rated for more than 100V. And these circuits often lose accuracy if the sense resistor common mode voltage changes quickly or swings both above and below system ground.

Digital isolation techniques (magnetic or optical) are a bit more bulky, but work without loss of accuracy and can typically withstand thousands of volts. These circuits need an isolated power supply but that can sometimes be integrated in the isolator component. If the sense resistor is physically separated from the main system then you also may need to run long wires or cables.

A wireless current sense circuit overcomes many of these limitations. By allowing the entire circuit to float with the common mode of the sense resistor, and transmitting the measured data wirelessly over the air, there are no voltage limitations at all. The sense resistor can be located anywhere, without the need to run cables. If the circuit is very low power, then you don’t even need an isolated power supply and can instead run for many years from a small battery.

Design Overview

Figure 1 shows the block diagram of the design. The current sense circuit is based on the LTC2063 chopper-stabilized opamp to amplify the voltage drop across a sense resistor. The micropower SAR ADC AD7988 digitizes the value and reports the result via SPI interface. The LTP5901-IPM is the radio module which contains not only the radio, but also the networking firmware needed to automatically form an IP-based mesh network. In addition, the LTP5901-IPM has a built-in microprocessor which reads the AD7988 ADC SPI port. The LTC3335 is a low-power DC/DC power supply which converts the battery voltage to a constant output voltage. The LTC3335 also includes a Coulomb counter which reports cumulative charge pulled from the battery.

Figure 1 - Wireless Current Sense Circuit Floats with Sense Resistor

Figure 1: A low-power wireless current sense circuit is formed by a low power chopper opamp to amplify the sense voltage, digitized using a low power ADC and reference, and connected to a SmartMesh IP wireless radio module. A low-power DC/DC converter conditions the battery and also keeps track of charge drawn from the battery.

Signal Chain

The LTC2063 is an ultra-low power, chopper-stabilized opamp. With a maximum supply current of 2µA, it is uniquely suited for use in battery powered applications. Because the offset voltage is less than 10µV, it can measure even very small voltage drops without loss of accuracy. Figure 2 shows the LTC2063 configured to gain-up and level shift the voltage across a 10mΩ sense resistor. The gain is chosen so that ±10mV full-scale at the sense resistor (corresponding to ±1A of current) maps to a near full-scale range at the output, centered around 1.5V. This amplified signal is fed into a 16-bit SAR ADC. The AD7988 was chosen for its very low standby current and good DC accuracy. At low sample rates, the ADC automatically shuts-down in between conversions, resulting in an average current consumption as little as 10µA at 1ksps. The LT6656 biases the amplifier, the level-shift resistors and the ADC’s reference input. The LT6656 voltage reference consumes less than 1µA, and can drive up to 5mA loads with low drop-out, making it easy to output a precise 3V, even when powered from the 3.3V system supply.

There are three roughly equal sources to offset error in this signal chain, together contributing about 0.5% relative to a ±10mV full-scale input. They are the offset voltage of the LTC2063 and AD7988, as well as mismatch in the level-shift resistors (0.1% resistors are recommended). A one-point calibration step could largely eliminate that offset. Gain error is generally dominated by inaccuracies in available sense resistors, which tend to be worse than the 0.05%, 10ppm/°C specifications of the LT6656 voltage reference.

Figure 2 - Wireless Current Sense Circuit Floats with Sense Resistor

Figure 2: The current sense circuitry floats with the sense resistor voltage. The LTC2063 chopper opamp amplifies the sense voltage and biases it mid-rail for the AD7988 ADC. The LT6656-3 provides the precision 3V reference.

Power Management

The LTC3335 is a nano-power Buck-Boost converter with integrated Coulomb counter. It is configured to provide a regulated 3.3V output from an input supply between 1.8V and 5.5V. This allows the circuit to be powered by, for example, two Alkaline primary battery cells. For duty-cycled wireless applications, the load current can easily vary from 1µA to 20mA, depending on whether the radio is in active or sleep mode. The LTC3335 has a quiescent current of just 680nA at no load, which keeps the entire circuit very low power when the radio and signal chain are in sleep mode. Still, the LTC3335 can output as much as 50mA, which easily provides enough power during radio transmit/receive and for a variety of signal chain circuits.

The LTC3335 also has a handy built-in Coulomb counter feature. When switching, it keeps track of the total charge that it draws from the battery. This information can be read-out using an I2C interface, and can then be used as a predictor for when it may become time to replace the batteries.

Wireless Networking

The LTP5901-IPM is a complete wireless radio module, which includes the radio transceiver, embedded microprocessor, and SmartMesh IP networking software. The LTP5901-IPM performs two functions in this application: wireless networking and housekeeping microprocessor. When multiple SmartMesh IP motes are powered up in the vicinity of a network manager, the motes automatically recognize each other and form a wireless mesh network. The entire network is automatically time-synchronized, which means that each radio is only powered on during very short, specific time intervals. As a result, each node can function not only as a source of sensor information, but also as a routing node to relay data from other nodes towards the manager. This creates a highly reliable, low power mesh network, where multiple paths are available from each node to the manager, even though all nodes, including the routing nodes, operate on very low power.

The LTP5901-IPM includes an ARM Cortex-M3 microprocessor core which runs the networking software. In addition, users may write application firmware to perform tasks specific to the user application. In this example, the microprocessor inside the LTP5901-IPM reads the SPI port of the current measurement ADC (AD7988) and reads the I2C port of the Coulomb counter (LTC3335). The microprocessor can also put the chopper opamp (LTC2063) in shutdown mode, further reducing its current consumption from 2µA to 200nA. This provides additional power savings in use models with extremely long intervals between measurements.

Overall Power Consumption

The total power consumption of the complete application circuit depends on various factors, including how often the signal chain takes a reading, and how the nodes are configured in the network. Typical power consumption for a mote reporting once per second is less than 5µA for the measurement circuit and can be 40µA for the wireless radio, allowing years of operation on small batteries.

Figure 3 - Wireless Current Sense Circuit Floats with Sense Resistor

Figure 3: A complete wireless current sense circuit is implemented on a small PCB. The only physical connections are the banana-jacks for the current to be measured. The wireless radio module is shown on the right. The circuit is powered from two AAA batteries connected on the back of the board.

Combining Linear Technology and Analog Devices signal chain, power management, and wireless networking products enable the design of a truly wireless current sense circuit. Figure 3 shows an example implementation. The new ultra-low power LTC2063 chopper op amp can accurately read small voltage drops across a sense resistor. The entire circuit, including micro-power ADC and voltage reference, floats with the common mode of the sense resistor. The nano-power LTC3335 switcher can power the circuit for years from a small battery, while reporting cumulative battery usage with its built-in Coulomb counter. The LTP5901-IPM wireless module manages the entire application and automatically connects to a highly reliable SmartMesh IP network.

Stay tuned for more Combo Circuits From the Lab blogs here on the EngineerZone Spotlight.

JLKeip

DDS v. PLL nuances (pt I)

Posted by JLKeip Employee Apr 25, 2017

As promised in my last post, here is [PART 1 of] a review of some subtleties of the table contrasting DDS/PLL strengths. I know I didn’t [initially] say anything about breaking this up into 2 parts, but after I started writing, I realized it was getting too long for a single entry, so I went back, edited the last post and finished writing this!  

I’ll start with the characteristics I identified as being better suited to a DDS.

Frequency Resolution – There are a few nuances here…

There exists a DDS which runs at 400 MSPS with a 48 bit tuning word (AD9956). This yields a tuning resolution of no worse than 1.42 µHz, yes that’s microHertz.  The resolution of a standard PLL is limited by the depth of the dividers in the loop, and they are a few orders of magnitude worse than this.  I would be remiss however if I didn’t point out that there are fractional-N PLLs (N being the division factor in the feedback divider in the PLL) which close the gap significantly.  There is a downside to using a frac-N PLL: more spurs in the output.  The signals are more jittery. 

Another thing to note is that a standard DDS cannot hit many exact ratios. In the standard DDS frequency equation the denominator is a fixed power of 2.  So, for example, if you have a 200 MHz sample clock, you can hit 50 MHZ exactly (/4), but you cannot hit 40 MHz exactly – you will be off by some tiny bit: if you used the AD9956, you could either be 0.142uHz less than 40 MHz, or 0.568uHz more than 40 MHz. 

Standard PLLs hit these precise ratios quite easily. As such if you need exact ratios, avoid the standard DDS.  BUT that doesn't mean you need to avoid DDS as a whole, if you like the other things about DDS, look to Programmable Modulus!

the Programmable Modulus DDS (which I, affectionately, refer to as p-mod) is a relatively recent innovation in DDS.  A P-MOD DDS allows you to alter the DDS equation so that the denominator is no longer restricted to a power of 2.  No PLL can compete with a P-MOD DDS (AD9913, AD9914, AD9915, AD9164 e.g.) for frequency resolution; I believe that is inherent.  I suspect I will write more about P-MOD in a future entry;  you can also read about it here.

Returning to the 40 MHz example above, the industrious engineer could design a system which used frequency hopping to spend 80% of the time just below 40 MHz and 20% just above 40 MHz, and you would not only end up with a signal that averaged 40 MHz, you would also mimicking the internal workings of a P-MOD.

I promise the rest of these will be shorter!

Frequency Agility

There are ways to introduce varying frequencies in PLLs, but they are not as well controlled, nor are they as repeatable as the digital approach available with DDS.

Frequency hops can be implemented with two parallel PLLs and a switch (They call ‘em ping-pong PLLs – no table, paddles or net required), but you either need one complete PLL for every frequency you might want to hop to, OR you need to allow some settling time if you change the frequency of the bypassed PLL.

You can also sweep frequency with a variable divider in the loop, but it is nowhere near as well-controlled or repeatable as a DDS based sweep

Phase Resolution & Agility

In an analog PLL, any adjustment to phase ends up cycling through the loop, so it’s not a precise, repeatable change like you get with a DDS. Digital PLLs enable some level of phase adjustment capability. 

Amplitude Resolution & Agility

Amplitude is not a parameter that PLLs vary.

Look forward to part II in the not too distant future. Questions may be posed either in the comments, or in the DDS Product Section of ADI’s EngineerZone.

When driving a direct sampling high speed ADC, the most likely place to degrade the performance is the interface between the final amplifier and the ADC.  With any direct sampling ADC there will be nonlinear charge produced in the sampling process. This charge is reflected into the input network each time the sampling switches close. If these are left un-attenuated they can be reflected back to the ADC and re-sampled, degrading the simple distortion or inter modulation distortion of the ADC. The input network of the ADC should be as close to 50 ohms as possible to allow for the maximum absorption of this nonlinear charge. Using a highly absorptive filter can improve the SFDR by suppressing the nonlinear tones created in the sampling process. 

 

Using the LTC6409 to drive the AD9265

The LTC6409 is a differential amplifier with excellent linearity making it an ideal driver for the AD9265. The AD9265 is a 16-bit 125Msps high performance ADC with better than 77dB SNR and 89dB SFDR at 100MHz. These specifications can quickly degrade by poor design choices when designing the input network. In nearly all cases a filter is required between the ADC and amplifier to reduce the wideband noise of the final amplifier. Both the design and layout of this filter are critical. The filter should be absorptive so that high frequency non-linearities from the sampling process are absorbed into 50ohm termination and not allowed to be reflected back into the ADC input. Figure 1 shows an absorptive filter network that can be used between the LTC6409 and AD9265. Figure 2 shows the filter response. The purpose of this filter is not to be highly selective but simply to attenuate the wideband noise of the amplifier and nonlinearities of sampling process. At high frequency the inductors become opens and the capacitors become shorts which directs the high frequency content of the sampling process to 50ohm termination resistors. If the traces are routed at 50ohms there will not be any return reflections and the SFDR of the ADC will not degrade.

 

Figure 1: Filter network between the LTC6409 and the AD9265 

 

Figure 2:  Simulated Filter response for the circuit shown in figure 1

 

Another potential source of distortion is an asymmetrical layout of the input network. With an ideal layout, the differential nature of the signals allows excellent common mode rejection and very good 2nd harmonic distortion. Any deviation from perfect symmetry will cause a mismatch in the differential signals which will manifest itself as 2nd order harmonic distortion. Even a simple design decision to flood copper closer on one side of the differential pair than the other side can cause a difference in ground current in the adjacent ground planes. This adds distortion to the system. Absolute symmetry is required for maximum performance.  

 

Figure 3 shows the PCB layout of the LTC6409 driving the AD9265 and the filter network. Care was taken to preserve the symmetry of the network as well as position the absorptive elements to maximize their effectiveness. The first set of absorptive elements are positioned so that any high frequency products are immediately absorbed. The main signal path meanders around the grounded copper until it gets to the second set of absorptive elements and finally to the source termination at the amplifier. This network maximizes the performance possible from the LTC6409 and the AD9265.

 

Figure 3:  Layout of the LTC6409 and AD9265

 

To compare the performance of the LTC6409 and AD9265, a board was designed to connect to the PScope software via the DC890. The absorptive filter in figure 1 and a reflective filter in figure 4 were populated and tested over frequency.  The AD9265 was clocked with a 125Msps low jitter clock and the LTC6409 was driven with a filtered sinusoidal signal from 48.1 to 178.1MHz.  The SNR and SFDR were recorded with PScope. A sample data collection can be seeing in figure 5. The comparison of SNR and SFDR with the absorptive and reflective filters are shown in figures 6 and 7. The SFDR is consistently better with the absorptive network, at some points it is up to 10dB better. The SNR is also consistently better until very high input frequencies when the SNR is dominated by other factors.

 

With an absorptive network, the performance of the system improves over a reflective network. The excellent performance of the LTC6409 and AD9265 was degraded when a reflective network was used. The results are clear with the LTC6409 and AD9265 but the practice of using highly absorptive and symmetrical input networks can be applied to any direct sampling ADC and differential amplifier.  By focusing on the interface between the amplifier and ADC, maximum performance can be realized.  

 

Figure 4:  Reflective filter used between LTC6409 and AD9265

 

Figure 5: Sample data collection from PScope.  58.1MHz being sampled at 125Msps

 

Figure 6: SNR comparison between absorptive and reflective filters

 

Figure 7: SFDR comparison between absorptive and reflective filters

 

Look for more Combo Circuits From the Lab blogs here on the EngineerZone Spotlight.

 

It’s a new beginning for Analog Devices and Linear Technology. Together we become the high-performance analog industry leader with an innovation engine fueled by our comprehensive portfolio of analog and mixed signal products and solutions.

 

 

We have been telling you that 1+1 > 2 and now we will show you. Over the next several weeks we will be highlighting the powerful combinations possible with ADI and LTC products in our new blog series: Combo Circuits from the Lab.

 

Read our first blog: Improving Linearity by Using Absorptive Filters by Clarence.Mayott tomorrow, here on EngineerZone Spotlight.

Have you ever been stuck without a hex wrench and resorted to trying to use a flat head screwdriver to fasten a hex bolt? It can work, but wouldn’t you rather have the right tool for the job? Well if you need to synthesize a sinusoidal signal, knowing a little about DDS will help you settle on the optimal solution.

Most engineers are exposed to PLLs during their schooling, but DDS is less universally taught. Seems like something worth blogging about. I wanted to get the ball rolling with a few comments on the comparative advantages – both have a place in your tool chest. The table below is a handy reference:

Comparing:

Advantage

  Clarification

Frequency Resolution

DDS

  Finer resolution allows you to get closer to hitting your desired frequency precisely

Frequency Agility

DDS

  Do you need a signal that changes (sweeps or hops) over time?

Phase Resolution & Agility

DDS

  Same as above, but applied to the phase of the signal

Amplitude Resolution & Agility

DDS

  Same as above, but applied to the amplitude of the signal

Power Consumption

PLL

 

Price

PLL

 

Broad Spectral Purity

PLL

  Can you work with an output spectrum that has a lot of low level spurs?

Ancillary circuitry

PLL

  How much external circuitry are you willing or able to add?

Freq. Upconversion

PLL

  Are you trying to synthesize a frequency higher than the reference you are working with?

I expect a couple of these comparison (Price, Power) terms don’t need any clarification, but the rest are less common.

Frequency Resolution: You are trying to get a signal of a specific frequency out, how close to that exact frequency do you need to be? Greater resolution allows you to get closer to your desired frequency.

Frequency Agility: Many applications only need a constant, stable output frequency, but some need to jump between frequencies and others need to see a slowly changing frequency – these latter applications require an agile frequency synthesizer.

Phase/Amplitude Resolution & Agility: Same as Frequency Resolution and Agility above, just applied to phase or amplitude of your signal.

Broad Spectral Purity: Most easily explained with pictures (below). While not an apples to apples comparison, it shows what I am talking about – the DDS has more (and larger) frequency spurs in its output spectrum than the PLL.  There are things that can be done to mitigate them (for more see ADI AN-823). 

 

 

PLL based design example

(from the AD9510 datasheet)

DDS based design example

(Lab data taken using AD9911)

 Ancillary circuitry: How many other components are needed to get to the complete solution? 

Frequency Upconversion (That’s not a word): Both approaches require that you feed in a reference signal of a given frequency, but if the frequency you are trying to synthesize is higher than the frequency of this reference, you are upconverting (That’s not a word either!).

Now to be fair, these are NOT hard and fast rules, almost every line in this table has some nuance that I’ll discuss in my next post 2 posts.

If you’d like to learn more about the guts of a DDS engine, check out the tutorial we put together here; you’ll find some slides with audio content that you can go through at your own pace.

If anything above raises a question - ask it; I’ll try to include answers in my next post as well.

When it comes to the topic of how to properly driver the front end of your SAR ADC, ADI provides quite a bit of guidance on the matter.  For example, you'll often find a list of "Recommended Driver Amplifiers" in the datasheet for a SAR ADC - like this table on page 16 of the AD7980 datasheet:

 

 

Also in the datasheet, there is often guidance on a good starting point for the RC filter component values - as shown on page 15 of the AD7980 datasheet:

 

 

Other sources of ADC driver guidance can also be found in:

 

For a deeper dive on this topic, Front-End Amplifier and RC Filter Design for a Precision SAR Analog-to-Digital Converter is an excellent resource.  This article will help you to understand the basic considerations of SAR ADC driving, and will help you to tailor your driver circuit design to better match your specific application.

 

We've been working to incorporate some of the knowledge and calculations we have across all of these resources into a new web tool - we have a "rough draft" version of this tool available for initial testing and feedback:

 

playground.analog.com/sardriverproto

 

We're going to keep working on this tool, making improvements to both the functionality and the look-and-feel.  But the feedback we receive on this early version of the tool is going to be very helpful as we decide which features we're going to work on.  Feedback and discussion on this tool can be provided in the comments section at the bottom of this post, or by clicking "Help us make this tool better" at the top right corner of the tool window.

 

 

 

 

To use this tool, you begin by providing your circuit design information - selected ADC and sample rate, selected amplifier/driver and circuit information, input signal frequency, and RC filter values.

 

The tool will generate illustrations/plots for these settings on four tabs.  The "Circuit" tab will illustrate the circuit information that was provided in the input panel.  For example, if we start with the rceommended RC value in the AD7980 datasheet, and use one of the recommended drivers, we'll have input settings and a circuit tab that looks like this:

 

 

Note the input values - AD7980 at 1MSPS, ADA4805 non-inverting, gain of one, 10kHz input frequency, RC filter values of 20 Ohms and 2.7nF.

 

Pro tip: as you're using this tool, the URL will continually update to reflect the configuration you have entered.  If you want to "save" what you're doing in the tool, just copy-and-paste the URL, and use it to reopen the tool where you left off.

 

Once you have your circuit set up, you can take a look at the other tabs to view the performance.  The "Noise and Distortion" tab will display and estimate of the combined performance of the ADC and driver.  In this early version of the tool, you can see the ADC performance vs. input frequency is green, and the driver performance is blue.  The combined performance is red, and is also summarized in the "Noise Performance" table at the bottom of the tool page.

 

In this example, you can see that the driver is not degrading the performance of the overall system very much.  The system performance is dominated by the ADC.  You can also compare the tool estimate to the datasheet SINAD plot:

 

 

Looking at the "Sine Response" tab, you can see that the sinusoidal error is very small (less than 1/2 LSB) - this means the RC values have been chosen such that the ADC input is able to properly settle after each kickback event, prior to the end of the acquisition cycle.

 

 

 

Taking a look at the "Step Response" tab - this tab simulates the settling behavior of the circuit assuming a multiplexed input, including the slew rate of the driver, and the effect of the RC filter.

 

 

With a multiplexed input, the input value can swing greatly between the mux input pins, and we can assume the worst case scenario is that the input voltage will swing the full range of the possible voltages.  Looking at the "Step Response" tab, we can see that out current design isn't going to settle in time for a multiplexed setup.  (See how the voltage is settling right at the end of the conversion cycle, but is not able to recover after the kickback in time for the end of the acquisition cycle?)

 

 

 

With this example, we can see that we don't quite settle from the kickback in time.  If we tinker with the RC value and switch to an 18 ohm and 2.2nF value, the circuit will settle to 1/2 LSB in time.

 

 

 

Were you able to use the tool for your design?  Did you find it helpful?  What could we improve?  

Technologies that just a few years ago still seemed like science fiction, edged closer to the commonplace in 2016.  Pokémon GO brought Augmented Reality into the public vernacular. The launch of PlayStation VR and other devices and apps pushed Virtual Reality into the hands of consumers and businesses alike. Google Home joined Amazon Echo and other apps to push Artificial Intelligence (AI) deeper into our lives. Uber added momentum to the shared economy model and commercialization of autonomous vehicles with the launch of self-driving services in several cities, even as the high-profile crash of an autonomous Tesla raised concerns about the current state of the art. When you combine these events with the continued consolidation of the semiconductor industry, global cyber-security concerns, and impact of the U.S. Presidential election, it’s clear that 2016 was no ordinary year.

 

Many of the events and trends of 2016 will continue to reverberate and shape 2017. Here are a few that I think will have the greatest impact on business, society, and all of our lives over the coming year and indeed beyond.

 

Artificial Intelligence Becomes More Human: Deep neural network algorithms that were long forgotten after their original invention in the 1980s have experienced a resurgence in recent years and are making great strides in driving AI in new directions, especially when combined with other sophisticated AI algorithms like reinforcement learning (e.g., the Go-playing “AlphaGo” program developed by Google Deep Mind). There has been a tsunami of research extending neural network algorithms and in 2017 this research will result in radically novel neural network algorithms that are superior to the older algorithms on which the AI community has been relying. For example, new “unsupervised” algorithms will be able to learn by simply observing the world in the field, rather than through “supervised training” algorithms that require large amounts of time and curated data. In 2017, we will see the development of theoretical methods that reduce the footprint of deep neural networks and of new hardware designs to efficiently implement those algorithms in a wide variety of distributed sensor networks.

 

Driving Intelligence to the Edge of the Internet of Things (IoT): The growth of the Internet of Things will obviously continue to accelerate but as issues of security and efficient rendering of high quality information begin to outweigh mere deployment, we will see a push for greater intelligence at the edge nodes of the IoT. That intelligence will take multiple forms – from algorithms and software at the edge that reduce the amount of data transmission to and analysis in the cloud, to security at the “front line” that reduces the attack surface of the IoT. We will also see the term “IoT” begin to fade from our vocabulary as it simply becomes part of the natural operation of business. As connected homes, enterprises, and cities become the “assumed” state of existence, we will transition from “connection” to “resiliency.”  The “resilient” home, enterprise, and city will be connected but part of IoT-scale intelligence and cybersecurity architectures that enable them to rapidly spot, recognize, and effectively respond to the inevitable challenges and threats they face.

 

Go Autonomous and Leave the Driving to AI: While the predictions of the ubiquity of autonomous vehicles in the next few years are overly optimistic, it is clear that the future is autonomous and we will make significant strides in 2017. The spread of self-driving delivery and transportation services and the proliferation of autonomous elements such as self-braking and parking in human-driven vehicles will push research into the state of the art forward ever faster. Improving the ability of autonomous vehicles to more accurately and rapidly sense the environment around them will be a key focus in 2017 and RADAR and LIDAR will increasingly become industry standard as their size and cost drop dramatically this year.

 

The Smart Grid Gets Smarter: Protecting, innovating, and developing the electric grid is becoming increasingly important. The smart grid is in its infancy, but the industry is already starting to look beyond simple automatic meter reading functionality to ways in which increased measurement and connectivity can return value. The role of data analytics to improve efficiencies and reliability is one of the major areas of investment, but also new ideas are appearing on the possibilities of exchanges that address the increasing pressure of diversification and fluctuation of energy sources and loads. Even more exciting is the possibility of the emergence of a new “digital grid” that enables a distributed delivery model that is more efficient and resilient than today’s legacy grids.

 


From Reactive to Predictive Healthcare:
The growth of our understanding of the human body over the past few years has been truly astounding. The development of extremely accurate computational biology models of our respiratory and metabolic systems is enabling new treatment options that weren’t possible before. The ability to provide clinical-grade sensing and measurement outside the four walls of the hospital or doctor’s office will be critical to those treatments. We will need to provide nearly always-on, secure, accurate sensing and measurement of our health statistics – Fitbit on steroids, if you will. This will enable the move from reactive to predictive and preventative healthcare. It will also create new business models such as outcome-based pricing where healthcare providers are paid for keeping us well rather than healing us when we’re sick.

 

These trends will have significant impact on nearly every facet of our world in 2017. As we reflect upon them and explore their opportunities, it becomes increasingly clear to me that the future lies not with a handful of technology companies, but within an ever expanding innovation ecosystem where a vast partner network collaborates to realize these and other societal benefits.

 

You know what we should ask for this holiday season? Technology. I don’t mean a cool gizmo gift like wireless earbuds or a voice-activated personal assistant. I mean honest-to-goodness, for-the-person-who-has-everything, smart technology.

 

If the Internet of Things is supposed to make our lives better, let’s start with the holidays. And you can’t spell “holidays” without “ADI.”

 

You Can’t Park Here.

Why is it that 4,000 other people have all found spots at the mall, but you’re always in a low-earth orbit stalking overburdened shoppers looking for their cars? Here’s one solution. A mall in Paramus, New Jersey, offers a reserved and gated parking space for $10 per four hours. You just download the app. Looking forward to Christmases Yet to Come, smart technology from ADI that can detect and notify you when a spot opens might be part of your holiday cheer, as we demonstrated last month at Electronica.

 

 This Is Delicious. What’s In It?

 The holidays mean holiday parties, and holiday parties mean lots of holiday food.  On top of the formal gatherings, there are the homemade goodies your neighbors leave on your doorstep and co-workers leave in the break room. It’s both difficult and Scrooge-like to deny ourselves all of this largess, but perhaps we could be a bit more strategic in our consumption. The SCiO pocket molecular sensor, created in collaboration with ADI, could let you quickly and easily scan the buffet table to measure fat content, sugar content, and maybe just how much bourbon is in the eggnog.

 

Our Brightest Christmas Symbol

According to new data from Nielsen Research, approximately 21.6 million real trees will be purchased by U.S. households this Christmas season. Bringing a fragrant conifer into your home is a great way to make the season bright. It’s also a great way make a mess. Most of that comes from a lack of water that results in dry, needle-shedding trees. An answer may lie in Smart Agriculture technology, such as that developed by Analog Devices to improve tomato harvests. A sensor-to-cloud solution could let us know when to water our trees much sooner than when the tree’s natural smart programming kicks in and it drops 20 percent of its needles on the living room floor.

 

 And Suddenly, There Arose Such a Clatter

 You would think the rooftop arrival of eight reindeer and an overloaded sleigh would not go unnoticed at your house, but I always seem to miss the event. Not this year. Our SMARTopolis demo at Electronica showed how carefully placed sensors and an accelerometer can detect and measure vibrations. A few of these on the roof and I’ll get a handy smartphone alert when my North Pole visitors make their stop.

 

 

  It’s Just What I Wanted, Unless It Isn’t

 A story in Newsweek cites research that shows shoppers return nearly $70 billion worth of purchases during the holiday season. And that doesn’t even account for the items that get re-gifted. We barely recover from the ordeal of buying gifts (see Parking above) and we have to jump right back into the fire to exchange them. Time for another smart technology solution. What if we could just discreetly leave the stuff out on the porch and use an app to summon a fleet of drones that’ll whisk it all away while we figure out how to apply all that merchandise credit to something we really want? Like those wireless ear buds or a voice-activated personal assistant.

 

 

 

Images: blog.allstate.com, Inspirational Quotes And Short Funny Stuff, williambriggs.com, clipart panda, bonappetit.com, cbronline.com

 

Click to TWEET: I'm dreaming of a Smart Christmas. #ADIahead #EngineerZone

bdaly

Flat in Cork. Elated in Munich.

Posted by bdaly Employee Nov 22, 2016

The journey to Munich from Cork involves a 200 mile drive to Dublin airport Saturday night. Not exactly a great start to be greeted with a flat tire in my driveway before setting out. Luckily, I had time to get it repaired. I collected Michal Raninec and we were on our way. We stopped in a pub on the way to Dublin, for a massive steak and to watch Ireland beat New Zealand in rugby for the first time in 111 years of trying—just the fuel we needed for our long ride.

 

We arrived at the show in Munich on Sunday morning around 11 am. The convention centre in Munich is huge, it takes about 45 minutes to walk from one end of the place to the other. It even has 2 subway stops. So a lot of walking was needed just to get to the ADI booth, and then more walking to locate our precious boxes of LEGO.

 

The unboxing was a tense affair, literally a make or break moment. But the LEGO survived the long trek to Germany in remarkable condition. Michal and I were happy bunnies as we unboxed building after building, with only very minor damage to repair. The temperature was barely above freezing, as all the hangar doors were open to allow trucks and forklifts into the exhibition hall. ADI parkas are sadly not supplied. Despite the solid state of the LEGO city it still took us two full days to set up the demos and debug the few installation issues. We did all this while surrounded by a large construction crew, busily building the booth. There was plenty of swearing at us in Polish as we peppered the crew with requests, including replacing some damaged HDMI cables they had installed. (They had no idea that Michal understood what they were saying). Colourful language aside, we were ready to see if the demo would work as we intended.

 

It’s Showtime!

The show started Tuesday morning at 9 am. The reaction to the demo was overwhelmingly positive. In fact, the demo was so successful, many people didn’t even realize we had tons of technology integrated, they just wanted to take selfies of themselves with SMARTopolis. Not that the competition was all that stiff, especially if you just came from 200,000 sq. ft. of power supplies on display in the next exhibit hall. I’ve worked on power supplies in the past. Winding transformers is about as sexy as it gets.

 


The biggest accomplishment and sense of achievement was that we were able to display many different aspects of the ADI story with one demo. We were able to demonstrate how ADI is moving beyond silicon, with systems and modules in hardware, algorithms and the ADConnect cloud offering. We were able to highlight ADI’s focus areas within Industrial Sensing, Smart Cities, Buildings, Agriculture and Structural Health. Many people commented on it being their favourite demo at the entire show, both in terms of the visual impact, concept and execution. Fortunately, my boss was one of these. At least that is what he told me, he probably said the same to his other guys at the show.

 

A personal highlight was when a LEGO employee showed up. (And I thought I had the best job in the world). We spent the bones of an hour discussing many things, and I now have an open invitation to tour the Denmark LEGO factory (if I ever get up there). His role is developing the electronics for all LEGO products, from motors to sensors. Unfortunately for ADI, their requirements are not high speed/precision/accuracy, so we don’t do very much business with them.

 

 

 

To keep the LEGO theme going, we filled a traditional German beer glass, MaBkrug with LEGO studs, and had a competition where people had to guess how many pieces were inside. Amazingly the guy from LEGO guessed the closest. He estimated the volume of the glass, and divided it by the size of the stud (which he knew the dimensions of). Even more impressive was that he did this in less than 5 seconds. Earlier that day I watched three guys from our Analog Garage team spend an hour trying just to estimate the volume of the glass. Pi*r2*h isn’t easy to do in your head. The answer was 4876 pieces. The guy from LEGO guessed 4800.

 

 

 

It’s a Wrap.

Friday at 5 pm was a bittersweet moment. The end of a tiring week, and a long journey which began months ago, in the basement at home playing LEGO with my kids. The LEGO train had completed a total of 73km (46 miles). The Ferris wheel made 11,667 rotations. Everything was still working great at the end, although the cheese from the Smart Ag demo station was beginning to go off. I was extremely lucky to have such a brilliant team around me, which made it all come together.

 

Big thanks to:

  •     Mike Byrne and Mike Britchfield. Their trust to allow me take a big risk at such an important event.
  •     Melanie Huber and Bernhard Siegel, the show and booth coordinators in Munich.
  •     Tyler Schmitt for putting a superb structural health demo together.
  •     Michal Raninec for making my life very easy.
  •     Shane Clifford for the efforts on the ADConnect ThingWorx Mashups.
  •     Maithil Pachchigar, Erick Olsen, John Curtin, Antoine Descazot, Grainne Murphy, Mike Hennessy, Sudong Shu, Frederik Dostal & Shane Clifford for helping out on the demo all week.

 

It took us only 90 minutes to pack everything up. I immediately switched focus to my next task, heading to Vienna the next day to watch Ireland play Austria in a soccer World Cup qualifier.

 

That result was as successful as the demo; a victory for Ireland.

 

 

Click to Tweet:"Flat in Cork. Elated in Munich. A victory for Ireland. #ADIahead"

Greetings from Electronica.  As always, the event is filled with amazing new technologies. If you’re at all involved with ATE and ETM applications, there’s something I believe you really should see. Analog Devices has brought a revolutionary new MEMS switch technology to Electronica. It’s a true alternative to cumbersome, conventional relay approaches.

 

Anyone designing ATE and ETM application will know the tradeoffs when needing switches in their designs. Bandwidth limitations, linearity, operation at 0Hz/dc, package size, actuation lifetimes and reliability, to name but a few. There are some nice relay switching solutions out there today but none tick all the performance and ease of use boxes.  Increased performance in smaller form factors is also a constant focus for test and measurement equipment now more than ever. A perfect small form factor switching solution is key to driving new architectures and staying ahead in the industry.  This is where ADI’s new MEMS switch technology delivers an ideal overarching solution. 

 

Here are just a few of the benefits of this new MEMS switch technology:

 Smaller, more flexible and higher reliability test and measurement equipment – greatly reducing size, component count, and cost.

  • Reduced test time and time to market as a key component in multi-platform, multi-standard test systems
  • Platform simplification with integrated driver IC and multiplexer configurations for fan-out applications
  • Lowest and flattest insertion loss across the frequency band – maximizing platform sensitivity and increasing test accuracy.
  • Widest variety of test challenges from a single platform while delivering the highest performance measurements – making testing more cost-effective.

 

We will be demonstrating this new MEMS switch technology all during Electronica. It’s a great way to see for yourself how ADI can give you a competitive edge in ATE and ETM, aerospace and defense, healthcare, communications, and other key markets.

 

Here’s some ways to can learn more:

  • Talk with our experts at the ADI booth.
  • See Eric Carty’s presentation at the Embedded Platforms Conference — Nov. 10. (16:00)
  • Reserve your place for the joint presentations with Advantest on Nov. 10 (10:30, 12:00, 14:30). Space is limited, so contact us right away. Send an email to: MEMswitch@analog.com

 

I look forward to seeing you during the show

 

You can find out more about what Analog Devices is doing at Electronica here.

 From making our mobile devices better and faster, to making possible innovations such as self-driving cars, smart cities and virtual emergency and operating rooms, the promise of 5G is intoxicating. What is much more sobering, however, are the evolutionary and revolutionary challenges facing device makers and network providers.

 

Enabling the 5G Evolution

The evolutionary path to 5G consists of incremental enhancements to 4G with Massive MIMO techniques providing significant improvements in spectral efficiency and  extending cellular operation up to emerging bands in the 3-GHz to 6-GHz range. There are opportunities for improvements in high frequency operation, bandwidth, reliability, power, size/weight, and cost, brought forth in enabling this radio form factor. We believe a system approach, such as the  RadioVerse development platform and ecosystem, will be essential to quickly and efficiently realizing true gains in these areas.

 

 

The Coming Revolution.

Getting more from the current state is a welcomed development as spectrum is seen as the lifeblood of the cellular industry. However, even with an expansion into the sub-6 GHz bands, 5G cannot support the exponentially growing demand, such data traffic increasing 10,000 fold within the next 20 years.

 

It’s that demand that’s fostering the coming revolution: the move to millimeter wave. While the sub 6-GHz range offers cellular bands in the hundreds of megahertz, the amount of potential spectrum above 20 GHz is in the tens of gigahertz. A promised land indeed, but one that must be tamed to fully realize the vision of 5G.

 

The cm/mmwave spectrum has been in use for communications for many years, primarily in aerospace and defense applications. Adapting it for use in commercial markets is where many of the challenges appear.

 

One of the major hurdles is overcoming the unfavorable propagation characteristics. Radio propagation at these frequencies is highly affected by atmospheric attenuation, rain, blockage (buildings, people, foliage), and reflections. Point-to-point links, are generally stationary, line-of-sight systems whereas the mobility requirements for 5G bring new challenges.

 

It is well known in the industry that beamforming will be required at high frequencies to overcome the path loss. The most cost effective method today is to use a hybrid system that combines analog RF beamforming and MIMO.  Along with beamforming, there are other significant considerations, including architecture and radio challenges. It is critical to design systems with power, size, and cost in mind from the start to bring these systems to reality.

 

As is often the case, challenges create opportunities. There is no shortage of either with 5G. Making the most of the opportunities ahead will require a rigorous systems engineering approach to leverage the best technologies throughout the signal chain. That includes expertise in a variety of processes and materials development, such GaAs, SiGe and CMOS. There is also much work to be done with design techniques and modeling, and high-frequency testing and manufacturing.

 

Committed to Bringing the Revolution Forward.

With continued RF technology advances and a rich history in radio systems engineering, Analog Devices brings a strong contribution to the 5G microwave effort. We believe our experience in aerospace and defense, as well as consumer-focused markets, provides the insight needed to develop viable 5G solutions. Our unique bits to microwave capability present a truly different choice for customers. One that can help our customers pioneer new solutions that both drive the evolution and lead the revolution in 5G.

 

Click Here to Tweet: ADI paves the evolutionary path to 5G #EngineerZone @Adi_News http://ctt.ec/1wdv3+

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