Many Analog to Digital Converters (ADCs) are defined as having their input full scale input range (FSR) in terms of a differential (Vpp) or single-ended voltage (Vp).  This is because an ADC samples a voltage seen between the true and complement analog inputs. However, many system designers really need to know how much input power, in dBm, that an ADC can handle before the input becomes saturated.

 

The full scale input of an ADC is the largest signal amplitude that can be delivered to the converter before the signal is clipped in its digital output representation. At full scale, the output uses the minimum and maximum codes of the ADC.  While some systems seek to maximize the dynamic range of the ADC by using as much of the effective input full scale as possible, a saturated ADC will add distortion and provide poor performance data. 

 

Most ADCs have a fixed input impedance, although others may provide various selectable impedance values.  This impedance, along with the input voltage, will determine the input power needed to drive the ADC input to its maximum.  We can convert the full scale voltage from an ADC datasheet to power in dBm, provided that we know the ADC input impedance.  Let’s take a look at an example calculation:

 

What is the Full Scale Input power (dBm) to this ADC?

 

ADC Full Scale Range = 1.0Vpp = 0.5Vp = 0.3535Vrms

ADC Input Impedance (Rin) = 50 ohms

 

Signal Power = ((Vrms2)/Rin) in units of Watts Signal Power

= 10 x log(((Vrms2)/Rin) x 1000mW/Watt)                                       


P(dBm) = 10 x log((Vrms2)/Rin) + 30dBm

= 10 x log((0.3535)2/50) + 30dBm = 3.978dBm


Power values expressed in units of dBm is are portable and the math is easy. A -1dB full scale signal would require an input power of 2.978dBm for this ADC of (3.978dBm – 1dB).  A frequency domain FFT expresses signal power in dB. Therefore, the sampled signal power, in dBm, at the ADC input can easily be determined by subtracting an FFT’s fundamental signal bin power from the full scale range power.  An AC coupled signal to the ADC will be centered about the common mode voltage of the ADC (Vcm). This will ensure that the maximum signal power can be realized by the ADC without clipping.

Figure 1 – A full scale signal will reach the minimum and maximum codes of the ADC, while a signal with increased power will saturate the input and have its digital representation clipped.  The power in dBm can be calculated with the known full scale voltage and input impedance, which in this figure is 50 ohms.


Thanks,

Ian Beavers

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