Being able to discern a signal from the noise is a key aspect of many signal acquisition systems. Whether it is a defined telecommunications protocol, a radar sweep, or measurement instrumentation, acquiring and deciphering weak signals is at the heart of any differentiating system performance. For gigasample-per-second (GSPS) ADCs, perhaps one of the most important ac performance specifications is SFDR. It simply defines the capability of the ADC, and the system, to decipher a carrier signal from other noise or any other spurious frequency.

In my recent Electronic Design column titled “Understanding Spurious-Free Dynamic Range In Wideband GSPS ADCs,” I examine how to achieve the conversion speed used in GSPS ADCs and why certain architectures take advantage of the full-bandwidth SFDR performance.

Figure 1. This is an FFT of a monolithic 12b ADC that shows the third harmonic as the dominant contributor to SFDR. In this case, the dynamic range from the fundamental (–1 dBFS) to the third harmonic (–82 dBFS) is –81 dBc, since it is relative to the carrier power.

To understand the impact of the converter SFDR on the system, my column answers some of the common questions from design engineers about the details of the SFDR specification, including how it is described in converter datasheets, the types of architectures that limit or maximize the ADC performance, and system design aspects that limit SFDR performance.

Questions I address include:

·         I have seen SFDR stated in datasheets with and without caveats. What exactly is SFDR?

·         What limits the SFDR of an ADC?

·         Can narrowband SFDR be extrapolated to wideband SFDR?

·         Can the SFDR of a differential input ADC be impacted by other front-end system components?

·         What are some ADC architectures that could limit SFDR?

·         What would the performance of an interleaving ADC look like in the frequency domain?


Eliminating Interleaving Artifacts with GSPS ADCs

GSPS ADCs that provide a high wideband SFDR, without the interleaving artifacts which have limited system performance in the past, are now available. The AD9860 is a dual-channel, 14b, 1-GSPS ADC that achieves SFDR of 78 dBc with a 1-GHz input. The AD9625 is a 12b, 2-GSPS ADC that offers typical wideband SFDR of 80 dBc with a 1-GHz input.


SFDR is an important and key performance metric in GSPS and ADCs. Wideband SFDR is typically limited by the second or third harmonic of the fundamental signal. Single monolithic pipeline ADCs and other advanced architectures are advancing a new frontier in high-performance GSPS converters. They do not exhibit the interleaving spurs in the frequency domain that have historically been present within ADC architectures in the GSPS space.


For those applications that require a wideband response, it can be problematic to navigate, plan, and remove these artifacts. New solutions solve these system issues to provide state of the art SFDR performance across a wideband spectrum.


I’ll be writing more on this topic, so please connect with me at and let me know what questions you have regarding wideband RF and GSPS converters.