Voltage monitor accuracy problem in ISVM mode Range A

Hi zhuyuqiang,

In order to enable VMEAS to report the voltage at the SENSE pin, you must be in the following conditions from the datasheet:

From the screenshot of your EVK GUI that you shared, HIZMPB was not enabled. Once you enable it, you'll end up with this GUI screenshot instead:

With these condition, you can monitor VMEAS and see that it follows the DUT_NODE (sense) voltage on the EVK. I verified this on my EVK setup.

One way to make sure you're in the right settings, is to use a fixed resistor between DUT_NODE and GND (instead of a short circuit), so that you can verify by measuring voltage at VMEAS. For example, with the conditions I've shown you above and a 4.02k load at DUT_NODE, VMEAS reads 2.01V (= 1V/(4*500ohm)* 4.02k) where Vin = 1V set and we're in the 2mA Range (500ohm sense resistor RC).

Hope this answers your question.

Regards,

Hooman

Hi Mr Hooman,

       I tick in HIZMPB check box, and test again. All the other Range VMEAS works ok, the offset is almost the same， the deviation is within 1mV. We can compensate it by calibration. Only Range A(1.2A Range), Vmeas's offset is not fixed, it is related with the output current. Different output current cause different offset. It can't be compensate by calibration. In order to find the offset problem, I hope you can repeat my test. Short DUT_NODE and GND_NODE. And connect Sense and DUTGSNS together and then connect to gnd, in order to input zero voltage to Vmeas op-amplifer. Then change FI current from -1.2A to +1.2A step by step.  I have test -1A, -0.8A, -0.6A, 0A, 0.6A, 0.8A, 1A and get the offset 1.7mV, 0.9mV, 0.1mV, -2.6mV, 1.5mV, 2.8mV and 4.1mV. 

      I also do a test to keep FI level not change, and change MAX32010 temperature from room temperature to nearly 100℃, the offset changed no more than 1mV. 

Hi zhuyuqiang,,

Here is what I measure between DUT_NODE (V) and VMEAS (V) and the value for IOSV DAC that makes the difference to be 0mV (FI mode, short jumper between DUT_NODE and GND, 1.2A setting, VGA Gain of +1 setting, CLH set to 0.5V (and CLEN asserted) to prevent excess current flow when FMODE is switched low):

I don't see any issues with these settings in terms of VMEAS representing the voltage at DUT_NODE (the offset between the two). Also, I'm able to drive the small difference between the two nodes toward zero volt by varying the IOSV DAC voltage, as shown above.

Hope I've answered some of your questions (at least for room temperature operation with the EVK fan running).

Regards,

Hooman

Hi Hooman,

      Thank you patience reply. 

       From your test result, the Vdifference between Vmeas-IOSV and DUT_NUT is changed from -19.6mv to 3mv. In the ATE industry, the Voltage measure accuracy is typically around 1mV. 

     I hope you can measure voltage between Vmeas and IOSV by a multimeter, because the on board ADC can't get the average voltage, the voltage ripple has a significant impact. 

    If it is proven that Vmeas is related to FI current, then why does it happen? And how can I compensate it, and get 1mV voltage measure accuracy?

Thank you.

 Zhu Yuqiang

Hi zhuyuqiang,

From what I'd measured, I'd seen up to 9.6mV offset between DUT_NODE and VMEAS (not 19.6mV as you'd marked up).

According to the MAX32010 datasheet, this can be as high as +/-25mV, copied below:

Regards,

Hooman

Hi Hooman,

     Of course, Voltage measurement Offset is allowed to be as hign as  +/-25mV, but it must be a fixed value in a design. The fixed offset value can be measured and be calibrated using linear fitting.  Usually the offset is related to temperature, from datasheet, it is very small.  Is my understanding correct?

Regards

Zhuyuqiang