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  • "quad-buffer" headphone amplifier
  • AD1835: Output filters
  • AD1835A: DC offset voltage
  • AD1836: Sampling at 22.05kHz
  • AD1845: DC offset
  • AD1852: ESD sensitivity, HBM model data missing from datasheet
  • AD1853 EVB
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  • AD1853: Two devices in parallel
  • AD1854: SPI port unused
  • AD1862
  • AD1871 single ended input range
  • AD1877: Calculation of the LSB value
  • AD1896: Configuration
  • AD1937: Failure due to  I2C interface
  • AD1939
  • AD1939: datasheet contradictions on SPI timing specification
  • AD193x family - supporting Sample Rates lower than 32 kHz
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  • AD1974 Stop Band Filter Response
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  • AD73322/AD73322L compatibility
  • AD73322: CD measurability
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  • AD73360 timing questions
  • AD73360: Frequency response over sample rate
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  • AD73360AR: DC performance
  • AD73360L: Reference does not always power up
  • ADAU1761: Can I connect one analog and one digital input channel to the ADAU1761 and process both of them together?
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  • Binary 2.20 format
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  • Clicks and pops on power up
  • Dejitter issue
  • Do Analog Devices still have a range of HD Audio Codecs or has this technology all been sold off to Conexant?
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  • Does volume control setting affect THD+N ?
  • EVAL-ADAU1472Z Evaluation Board support files (public)
  • EVAL-SSM2518Z evaluation board documentation and DLL for I2C control
  • Evaluation board Datasheet
  • FAQ: Can a digital microphone's PDM output be directly connected to an I2S input?
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  • Gerber files for Eval board
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  • How to connect unused SDATA inputs on ADAU1966?
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  • I2S interface configuration
  • Interesting microphone application - "Acoustic telescope"
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  • Stand-alone Modes on the AD193x audio CODECs
  • Temperature drift of the internal PGA
  • The relationship between value of Input Level Control register (Address 0) and gain value
  • Unused analog input pin connection
  • Using ADAU1761 for microphone beamforming
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  • Using LRCLK as PLL input
  • Video: Getting started with the EVAL-ADMP441Z
  • Video: Microphone Array Beamforming with the ADMP504
  • Whether it is pin compatible with TI TPA2010, On-Semi NCP2820?
  • Why doesn't Analog Devices manufacture 32-bit audio converters?
  • Working at 8KHz sample rate

AD1937: Failure due to  I2C interface

Q 

We have an audio device built around the ADAU1445-DSP and the AD1937 CODEC. 
The ADAU1445-DSP is the clock master.
Both of them are controlled on the same I2C bus by a processor, with a
software, (‘bit bang’), I2C.
7 bit address of the AD1937 is 0x04 and the ADAU1445 is 0x38.
When our processor gets busy, the I2C is a low priority and gets interrupted.
We can see on the oscilloscope that sometimes midway through an I2C
transaction, both the SCL and the SDA ports stay low for about 40ms.
This within the I2C specs as there’s no limit on clock or data speed, the I2C
protocol analyzer, (http://www.totalphase.com/products/beagle_ism/ ),  shown no
errors, took us a while to notice the 40ms delay in the transaction.
When this 40ms both signal low happens, the AD1937’s AD clocks lock up:
- Both clock pins, (ALRCLK and ALRCLK), turn from normally configured input to
output,
(and as our system is normally configured as CODEC slave, we have very loud
noise sent on all AD channels with two out of phase clock sources).
- I2C communication is working OK, can write and read all registers.
- Verified, that all written commands into registers are correctly executed,
except the AD clock pin directions, we can even change the ABCLK rate.
Only Hardware reset will release the AD1937 from this locked state.   We are
wondering if this problem is known to AD, or you can see something we are
missing, (and possibly on the wrong track).

 

A 

We have done a comprehensive analysis of Stand Alone mode in the AD193x family
of parts. Given the fact that the customer is using the AD1937, I will refer to
the I2C pins, with respect to the corresponding stand alone mode pins.

There are 4 pins total that are used for Stand Alone mode: ADDR0, ADDR1, SCL,
and SDA, see the table 12 n the datasheet.

Usually, it would be assumed that an IC would look at the Stand Alone mode port
once at startup and stay fixed, in or out, of Stand Alone mode until the next
reset. However, it appears from bench testing that the AD1937 will go into
Stand Alone mode if ADDR0, ADDR1 and SCL are all held Low for more than 4 mS,
with the state of SDA setting the ADC Clock ports to Master or Slave. At the
same time, the Stand Alone mode will revert to *default* state if the pin
conditions above are removed.
If the customer is using ADDR 00, two of the three pins are already low. If the
SDA and SCL pins are held low for 40 mS, this would certainly put the part in
Stand Alone Slave mode, and when the SDA and SCL pins come back high, the part
will be left in default. The easiest solution would be to change the I2C
address by pulling either or both ADDR0/1 pins high; the AD1937 will never go
into Stand Alone mode.
P.S. After some lengthy testing, it turns out that the part does not lose its
register settings when it goes into and comes out of Stand Alone mode.
  • ad1937
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