AD1938 CODEC

Hello,

What hardware are you using? 

What is going on with the reset pin?

Is there a clock on the MCLKI pin?

Dave T

Hello,

I had a few minutes to pull up an eval board, open up SigmaStudio and capture some communications between SigmaStudio and the AD1938 eval board. I wanted to see if I was missing something obvious as well. 

SigmaStudio has to deal with the Windows USB drivers and it also takes a while to do things from time to time. 

So here is a screenshot of my scope. The four traces from top to bottom is the CLATCH, MOSI, CCLK, MISO. 

You can see the chip address and read/write but set to read. (high) 

Then the next byte is the address which in this case is address 0x00. This is the PLL Control 0 register.

Then you can see the MISO go high almost right away. Which tells you how long you have to wait before trying to clock out the data and in this case it is not very long at all. However, SigmaStudio waits for a long time and then finally sends the eight clocks to clock in the data. The data in this case should be 0x98 and that is indeed what it is. I will add a few more screenshots that are a zoomed in.

This is the chip address and data address bytes. You can see that the time for the data to appear will be in nano-seconds. 

You can also see measurement 4 on the scope is the clock frequency that SigmaStudio uses. 427kHz. 

Here is the data byte:

0x98 is correct. 

So I have no new questions for you. 

It looks like you are formatting the message correctly. This leaves it up to things like no clock, the part held in reset, no power or ground. Etc. 

So answer my previous questions and perhaps send over a schematic? 

This will end up being something simple, we just have to find it. 

By the way, all the things I have mentioned above I have done when wondering why I am not communicating.... so I have been there done that! LOL

Dave T

hii now i am getting the data in miso,

now one more problem is there ,can you help , i want to configure ad1938 for i2s, and providing external m clock of 12.2 mhz  from other board , can you confirm these register values are correcty

pll control reg0- 0x91 

pll control reg0- 0x01

dac control reg 1-0x00

dac control reg 1-0x00

dac control reg 2-0x81

Hello,

Glad you have made progress.

ad1938 said:

pll control reg0- 0x91 

Bit zero is a "1". This powers down the PLL. Not good. You want to use the PLL.

You have the MCLKO pin set to 512 x fs. So that would be 24.576MHz. Are you using the MCLK output of the part? If not then turn it off. 

So 0x98 would be having the PLL on and the MCLK output pin off. 

ad1938 said:

pll control reg0- 0x01

I assume this is a typo and you meant to say PLL CTRLReg1?

You want the PLL to be the clock source for the DAC. So a value of 0x00. 

If you really want to direct clock the DAC from the MCLK IN Pin then you MUST input a 512x fs MCLK. A 12.288MHz would be OK for a 24 kHz sampling rate. 

ad1938 said:

dac control reg 1-0x00

Again, I assume you meant Reg 0? 

This is good. No issues here. 

You have DAC Control Reg 1 as also zero. That is also fine. No problems that I can see. 

ad1938 said:

dac control reg 2-0x81

You have this as 0x81. 

The LSB is the Master Mute. If you want to hear anything you need to unmute so clear this bit to clear the mute. 

The "8" is a tough one. The "1" in the MSB is in a reserved bit location. But, I think this may be wrong but I am actually not certain. I have a part in front of me and when I read it I get an 0x40. Again, the "1" is a reserved bit and I do not have the information to know what it is. 

Thanks

Dave T

i am using AD1938 as slave mode and giving MCLK of value 12.2mhz to the HDR1 MCLK PIN and also i am using the DIN,BCLK,LRCLK of the HDR1 for input ,along with that i have connect the jumpers, You can see in the screenshot , but still i am not getting i2s output , can you help me out.

Hello AD1938,

I am out of the office today but took a moment to reply. Can you send me pictures of your setups? Take a few, an overview and then several closeup shots so I can see all the jumpers and where you have connected it. 

I am also just now remembering that there is an error in the silk screen on some of these boards where the DLRCLK and DBCLK are swapped on the header! Ugh! Try this if you can. Remove the LRCLK and BCLK connections on Header 1. Set the DBCLK and DLRCLK pins to master mode and look at the header 1 pins with a scope and see which pin has the LRCLK and which one has the bit clock. then connect your jumpers accordingly. 

Dave T