Lark Studio I2S Playback

Hi Ajit,

Sorry to hear that you are having problems getting the examples to work, I am sure we will find a solution easily.

However, I would like to know what kind of microphone are you using, as some microphones need polarization that the board does not provide. To make things simple, we recommend connecting a phone or computer via 3.5mm jack cable as the signal source. You will need to change the jumpers next to the input jacks to use the single ended input configuration, as the default is differential.

Also, it is important to note that selfboot must be set to low when using Lark Studio; otherwise the DAC will be internally muted.

Please let me know if this fixes your problem.

Kind regards,

Roberto

Hi Roberto,

 Thanks for your response.

 The AIN0 was differential by default, changed the jumpers to use single ended, verified SELFBOOT_EN and it was set to low. Also used audio source from PC connected using 3.5mm Jack to AIN0, headset to output P30. The audio is working now.

While using other example demos like “lark-demo-adc-dac.larkproj” “lark-demo-adc-eq-dac.larkproj” could not hear audio. Tried connecting a MIC to AIN0 and headset to Output no audio was heard. Please let us know if any other changes in setup to be done.

Could you also please let us know if there are any I2S profiles similar to the examples that can be downloaded on the target.

Thanks,

Ajit

Hi Anuj,

I'm attaching a larkproject with the configuration you were showing and it was tested on my side that works (I can see the signal mixed on the DAC)

Important pieces of the project to look:

on Power Configuration:

CM_STRATUP_OVER --> CM_BST_OFF. we should enable it only during booting, after that needs to be disable to get best performance.

on FDSP Tab:

FDSP_CTRL4 --> Use SAI0 as FDSP_RATE_SRC. If we are not using any other signal, we could use the SAI0 as it is going to be enable. We are setting the SAI0 as 48KHz so if we do not use interpolators, datapath needs to be set at 48KHz

On DAC Configuration:

DAC0_Route: FDSP0 --> I understood that we wanted to output the signal from the FDSP0.

DAC_FS: --> 48KHz. If we are trying to output FDSP0 which clock source if 48KHz

Test_Project.zip

Regards, Jose

Hi Jose,

Thanks for your reply, we now have the audio working with test project you shared. We will try capture path and update you.

Regards,

Ajit

Hi Jose,

We have created a schematic where we enabled SPT0_IN and SPT0_OUT. We selected the source FDSP0 for SPT0_OUT(attached the snapshot SPT0_OUT and schematic of route) We initiated data from the platform to SPT0_IN of codec and playback was successful on speaker. Now initiated record on the platform which takes data from SPT0_out of the codec. the recorded file has noise along with data.

Can you please help us how do we get data without noise from SPT0_IN and SPT0_OUT.

Also please let us know how do we route mic data to SPT0_OUT.

Regards,

Ajit

Hi, 

If the playback data is fine, maybe there is some configuration on the recording device that is not correct.
About how to route data from the mic to the SPT0, The registers SPT0_route selects the output data of the SPT0. Have in mind that the sampling rate selected is 48KHz so either you should capture the data at that sampling rate, or use the decimator/interpolators/ASRCs for that purpose as the data needs to be sent at at the same rate that LRCLK_Rate


Regards, Jose

Thanks Jose for the reply.

Wanted to know how to generate the master clock for 96KHz, 16 channel and 32 bit as could not find in BCLK_SRC.

Also could not find how to configure the clock source for sampling frequency 44.1KHz and 88.2KHz which was required to create routing using these frequencies.

Could you please help us understand how to generate/set the clock for the desired frequencies.

Regards,

Ajit

Hi Ajit,

16 channels at 32 bits with sampling rate of 96KHz is not supported. that means 50MHz bitclock and the maximum bit clock supported is 24.576MHz.
you can configure the sampling rate with LRCLK. and then multiplying per number of channels desired and bits per channel you get the bitclock.

About how to generate 44.1 KHz clock source it is not supported on ADAU1860 driving the clocks.

Regards, Jose

Thanks Jose for the response,

Can you please let us know which ADI codec will support these Sampling freq 44.1Khz, 96KHz etc and corresponding bclk?.

Also wanted to know why in LRCLK all freq ranges like 96k are available  in ADAU1860.

Regards,

Ajit

Hi Jose,

I have a couple of questions:

1. In the Test_project.zip you shared, I noticed that FSDP is used, but the FDSP run option isn’t enabled. Could you please clarify why it wasn’t enabled?

2. Can we perform simultaneous capture and playback in I²S? I observed that the routing seems to allow only one direction—either playback or capture. Could you please help me understand how to configure the routing properly for SPTin (playback) and SPTout (recording)?

Thanks and regards,
Sujith

Hi Sujith,

I just checked and FDSP_run is enable. maybe you overwrite the project. I recommend to download it again.
I'm not sure what you mean with routing only supports one direction. you can record and stream at the same time. on the SPT tab you can configure the output, and then the inputs can be used in the different tabs, decimator, interpolator, FDSP, ASRC...

I missed you last question (almost 1 year ago). ADAU1860-1 supports a wide range of sampling rates, that includes 96KHz. 44.1KHz is supported but through the ASRC and it requires the other chip driving the clocks.

Regards, Jose

Hi Jose,

Thank you for your response.

I need some clarification regarding the following setup:

My current I2S configuration is: 2 channels, 32-bit, 48 kHz.

I’m able to successfully play audio from the SoC to the codec and hear it through the headset. However, recording is not working as expected — I only get noise instead of valid audio.

I’ve attached a ZIP file (workingi2s_2ch_32bit_48kplayback_cap_not_working.zip) containing the files I'm using. Could you please review them and let me know what might be missing or incorrect in the recording configuration?

Note: I do not wish to use TDSP, FDSP, interpolator, or decimator in this setup.

Looking forward to your feedback.

workingi2s_2ch_32bit_48kplayback_cap_not_working.zip

Thanks

Sujith

Hi Jose,

Thank you for your response.

I need some clarification regarding the following setup:

My current I2S configuration is: 2 channels, 32-bit, 48 kHz.

I’m able to successfully play audio from the SoC to the codec and hear it through the headset. However, recording is not working as expected — I only get noise instead of valid audio.

I’ve attached a ZIP file (workingi2s_2ch_32bit_48kplayback_cap_not_working.zip) containing the files I'm using. Could you please review them and let me know what might be missing or incorrect in the recording configuration?

Note: I do not wish to use TDSP, FDSP, interpolator, or decimator in this setup.

Looking forward to your feedback.

workingi2s_2ch_32bit_48kplayback_cap_not_working.zip

Thanks

Sujith