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TDM Data Calculating

Category: Hardware
Product Number: AD1938

Hello to every one, I hope you doing well.

I need some help about AD1938 TDM input.At page 15 of AD1938 we have TDM signal diagram. According to datasheet we have to set DBCLK to 256xfs that if we want to have 48Khz audio we have to set DBCLK to 12.28Mhz. Now I have a data set for a audio signal and break them to every 4mS. We have 8 DAC and each of them is 24 bit and sampling frequency is 48Khz so for each 1mS we have to send 8*24*48=9216 bit data or 1152 byte data. So for 4mS we have 1152 Byte x 4 = 4608 byte data. Now according to DBCLK frequency calculation that mentioned in datasheet, we have send this data with 12.28Mhz frequency that its so faster than 4mS.Now my question is that what will happen for DAC output at part of TDM signal that DSDATA is zero. What will be the output value of the analog signal when TDM signal is zero? As shown in the picture, what will be the output of the analog signal during period of circle A?As you see yellow circle is near to 36000 bit of data that send out with frequency of 12.28Mhz.The total duration of the two circles is approximately 4 milliseconds.Now we have a zero state of DSDATA with duration of circle A. Is it correct way for sending data of each 4mS of a signal with TDM?Is there any buffer for DACs?If yes how can we know its size?Should we set a delay other than one bit offset between sending each TDM frame?How is this difference between data transmission (1 millisecond) and the audio volume that should be played (4 milliseconds) justified? Only in one case is it possible to have a buffer inside the converter and receive a certain amount of data through TDM and then convert it with a frequency of 48 kHz.The reason of 4mS is that I receive audio signal from another protocol and that send me data of signal each 4ms. the picture is my TDM output.

thanks for your helps.

I added some questions
[edited by: ELEC23 at 3:56 PM (GMT -4) on 20 May 2024]
  • Hello Elec23,

    Please do not take my writing in any bad way since I cannot use tone-of-voice in a forum post!

    You are not setting this up correctly and not thinking through this problem fully. Let me see if I can help...

    First, I need to answer your question about the DAC. The DACs have no buffer with the exception of the shift register to shift in the data from the serial port. Once the data is completed at the end of the sample period, the data is shifted into the DAC and it outputs the level based on the number it received. So if you send it zeros it will put out zeros. If it suddenly changes then the output will suddenly change and the oversampling filters will ring because of that. It will not be good. 

    The problem needs to be split up into two different sections. The input and the output. I know you are aware of this. 

    since the data is coming in big chunks every 4ms you need to have a buffer capable of capturing 4ms of samples. At 48kHz that is one sample every 20.8us. So 4ms is exactly 192 samples. this is for only one channel.  For all eight channels that is 1,536 samples. You may want to have two buffers you swap, one for incoming data and one for outgoing data but that all depends on how dependable the timing all is. So this is the input side. Fill up the buffers. 

    Then for the output side you have to setup a timer/counter or however your sampling rate is setup to interrupt the processor every sample period. 

    I cannot get too much more specific since I do not know some important details about your system. But you then have to load in the serial port output shift registers with eight channels of data every sample period. Then if you are bit-banging the TDM interface you will have to setup another interrupt on the bitclock line to tell you when you need to output the next bit. You do this until all 256 bits are shifted out. 

    Based on this number I am assuming you are setting up the TDM to be eight channels, TDM-8 and with 32 bits in each channel slot. That would be 256 bits shifted out every sample period. 

    Once the frame ends (frame means the sample period) then you load up the next 8 samples and away you go!

    I have this old past on how to capture these signals on a scope. I really need to write another one of these for TDM. This one is just for I2S which is a two channel standard but the basic concepts are the same. 

    (+) How to Take Meaningful Screenshots of I2S Audio Signals - Q&A - Audio - EngineerZone (

    The TDM screenshot you showed does not look correct but it is not detailed enough to really see much. 

    Dave T