SSM I2C issue

Hello Analog404,

Thanks for the screenshots. It was a little bit of work to decode but I think I see what is going on. 

For the Read sequence. You are sending the Start then the device address with bit A0 set to {write) and then the address. This part is all correct. (Actually I have one comment later about the address)

 Then you send a repeated start with the device address but you have bit A0 low which is a write command. But A0 needs to be a "1" to set the interface to read the data from the address you just wrote before the repeated start. I think that is where you are going wrong. 

Here is how it is defined in the datsheet:

Regarding the address. It looks like you are sending three bytes for the address. The device only uses one byte for the register address. 

Dave T

Hi all,

Thank you for the reply. Our device address is 0x31 and in the waveform we are writing and reading from address 0x5. The SDA_I and SDA_O are the input and outputs of the tristate buffer driving the SDA line. In case of read, we are first writing the device address with A0 bit set to write (0), then register address, followed by restart condition and device address with A0 bit set to read (1) and keeping the bus tristate for next 8 clocks, then acknolweding it (by pulling down sda) again keeping bus at tristate  for 8 clocks and not acknowleging it followed by stop condition. Could you please reverify the waveforms are correct?

Awaiting your reply....

Hi all,

Thank you for the reply. Our device address is 0x31 and in the waveform we are writing and reading from address 0x5. The SDA_I and SDA_O are the input and outputs of the tristate buffer driving the SDA line. In case of read, we are first writing the device address with A0 bit set to write (0), then register address, followed by restart condition and device address with A0 bit set to read (1) and keeping the bus tristate for next 8 clocks, then acknolweding it (by pulling down sda) again keeping bus at tristate  for 8 clocks and not acknowleging it followed by stop condition. Could you please reverify the waveforms are correct?

Awaiting your reply....

Hello Analog404,

Analog404 said:

followed by restart condition and device address with A0 bit set to read (1) and keeping the bus tristate for next 8 clocks, then acknolweding it (by pulling down sda) again keeping bus at tristate  for 8 clocks and not acknowleging it followed by stop condition. Could you please reverify the waveforms are correct?

I do not understand why you say "keeping the bus tristate" for 8 clock cycles? This should be the data you are requesting. 

Then you still should provide an ACK at the end and then present the stop condition. 

The waveforms are too small and not detailed enough for me to truly verify this. From my looking at it I do not see you setting the read bit to "1". That was what I circled in my screenshot. I just don't see it but again, it is hard to see that small detail. 

Some software will decode and place the data on the screen which can be helpful. 

Dave T

Hi sir...

Thank for your reply..

In software we have monitored I2C signals. Down below is attached file.

kindly have a look at this link:

https://photos.app.goo.gl/qsa93a1gQBCrdSDVA

Awaiting your reply...

Hello,

Analog404,

Can you post the pictures up here on the forum. I do not want to go out to some Google site to pick them up.

Dave T

Hi sir...

In software we have monitored I2C signals.Down below is attached file.

Kindly have a look sir.

Awaiting your reply...

Thank you...

Hello Analog404,

There is one thing I do not understand. How can you have screenshots that are different that you labeled SDA_O and SDA_I. I assume one is the SDA Out and the other is SDA In. However, there is only one SDA pin. there is no possible way to have two different signals there. So how are you getting these screenshots? the SDA pins should be directly connected together so you would only have one signal in the screenshot. 

Looking at a hardware schematic might be a good idea. 

Dave T