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Does point to multipoint I2S connection work?

Category: Datasheet/Specs
Product Number: ADAU1467

Hello support team.

I want to know if it is possible to make a point to multipoint connection with the I2S interface.
According to the diagram below, I intend to use three ADAU1979 A/D converters with I2S outputs as masters.
I intend to share the ADAU1979 outputs with three ADAU1467 audio processors.
The two conjugated I2S output channels of each ADAU1979 will be connected to the I2S inputs of the ADAU1467 that will operate as an I2S slave:
1 - the BCLK bit clock of ADAU1979 goes into the BCLK_INx pin of ADAU1467;
2 - ADAU1979's LRCLK frame sync enters ADAU1467's LRCLK_INx pin;
3 - the SDATAOUT1 data output of the ADAU1979 enters the SDATA_INx pin of the ADAU1467;
4 - the SDATAOUT2 data output of the ADAU1979 enters the SDATAIOx pin of the ADAU1467 which will be configured as an input and uses the same synchronism as SDATA_INx.

  • Hello,

    Yes, it is possible to connect the ADC outputs in this configuration. It is designed to do this. Due to the increased PCB capacitance and possible long trace lengths it might be difficult to get a sample rate of 192kHz to be click and noise free. This turns into a signal integrity exercise and the drive strength of the ADAU1979 might have to be increased. Generally, a fanout of three is not a problem especially if operating at an fs around 48kHz. 

    One important detail not mentioned is where does the master clock come from? One suggestion is to drive all three ADAU1979 ADCs with the same master clock and it would be best to use the CLKOUT pin of the ADAU1467 to drive it. Then use one clock source to drive all the ADAU1467 parts. There are a number of ways to do this. you can make one of the ADAU1467 DSPs have a crystal and make its CLKOUT go to the other two DSPs and to the three ADCs. For that I would use a clock buffer to drive them. You could use a clock oscillator module and then use a clock driver that can drive all of the parts. You could use one clock oscillator module to drive the three DSPs and then each DSP use its CLKOUT pin to drive one of the ADCs.  It all is about the same thing and achieves the goal of synchronizing all of the parts to the same master clock. Then you will not need to use the ASRCs to adapt to really close sample rates. 

    By the way, depending on what you are doing with these signals. Another topology would be to bring in all the ADCs into one DSP. Then do some common processing on that DSP then send the signals out through a serial port over to the other two DSPs. The delay would be known and could be compensated for. 

    Dave T