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ADAU1701 + ESP32 + I2S connectivity

Category: Hardware
Product Number: adau1701
Software Version: simgama studio

Hi,

Currently I am trying to integrate ESP32 bluetooth I2S output with ADAU1701. My board is based on EVAL-ADAU1701MINIZ-8 design. AUX inputs work fine. If I connect ESP32 with in-built DAC via AUX in, it still works with little noise. However, issue is when I am trying to use the I2S. I am connecting output from ESP32 to following:

1. LRCK - MP4
2. BCLK - MP5
3. SDATA - MP1

Result is only noise. I have been trying to change PLL jumpers, but no luck. Changes resister settings e.g enabling/disabling master mode, changing word length etc. However, all these setting are for SDATA OUT, and I am at this point not much bothered with it as I am using DAC to output to AMP.

Is there anything that I am missing? Do I have to change any clock/frequency settings somewhere?

Thank you in advance.
-Mayuresh

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  • Hello Mayuresh,

    This is one of our older processors and has this unusual setup. If the clocks coming into the serial port are not synchronous with the master clock coming into the PLL, then it mutes all the outputs. So either the DSP has to be the master for the serial port clocking or the master clock coming into the DSP needs to be from the same source as the serial port clocks. 

    Try this experiment. 

    Set up an oscillator in the DSP core to go out of the DACs. Do not forget to go through a volume control so it is not at 0dBFS. Then do not turn on the clocks to the serial port. You should have output from the DSP. Then just turn on the clocks to the serial port and I expect the DACs to mute. 

    I have also seen it where the frequencies are close so it works for a few cycles of audio then mutes for a short time then unmutes for a short time etc. You end up with lots of distortion. If the clocks are way off you get a steady mute. 

    Dave T

  • HI Dave,

    Will try what you have suggested. Currently I am getting some output but its full of noise and distortion. This is why I asked earlier, is it possible to use a different value close than 12.188 so I can match these values with a same value clock and with PLL0 & 1. 

    Thanks
    -Mayuresh

  • Hello Maturesh,

    Draw out a diagram showing where the clocks are coming from? Where is the master clock, the bit clock, the LRCLK coking from and going to and what is the direction of the clocks? 

    Then the actual frequencies will also help. 

    Dave T

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