We are using the ADAU1761 audio codec part.
The input to the MCLK is from an onboard Oscillator and is 12.28MHz and interfacing to the controller through I2S and in slave mode.
We have an issue with MCLK and I2S Clock sync issue and are not able to see outputs on Line out.
More details of the connection/circuit can be found in this thread: RE: Schematic review request for ADAU1761BCPZ Audio-Codec
The evaluation board has an option of MCLK through an onboard Oscillator and other external options. What was the test setup used with the onboard oscillator?
[edited by: KLN at 6:38 PM (GMT -4) on 18 May 2022]