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ADAU1966 software question

Hi guys:

       my customer is designing a project. they using adau1466 and adau1966A.the ADAU1466 output TMD16 mode audio to ADAU1966A.

       Because the customer has a problem in the communication between adau1466 and adau1966a, in the front end of adau1466, the customer keeps turning on and off a channel, and the 1kHz sine wave output from one of the channels of tdm16 is incomplete. Periodically, one section is flat and accompanied by noise. At present, the customer thinks it is the PLL lock of adau1966a. When the probe is used to test the TDM signal, this phenomenon disappears. It's the same when the tweezers are used to point it. After sending it to the customer, it's the same. In the transmission of tdm16, the customer adds resistance and ground isolation capacitance, which has little effect, but can reduce the noise. 

      When we use one usbi to debug, we burn the adau1466 project by usbi spi mode in turn, and then burn the software of adau1966a by usbi i2c mode to debug the sound (adau1966a I2C mode, the independent mode previously used by customers, that is, the hardware mode). Then when the customer uses MCU to control the code input, I find that adau1466 can output good tdm16 waveform, but when I use usbi to adjust adau1966a,It can't make any sound when using the exported code to guide adau1966a in MCU. MCLK is given by adau1466. We use as like as two peas, and ADAU1466 and ADAU1966 have the corresponding audio interface configuration, all I2S delay -1 mode. But the strange thing is that there is still a little noise when using left alignment. When changing to the corresponding I2S delay-1 mode, there is no sound, and the chip is not hot. My question is whether adau1966a is required to start before or after adau1466. At present, I2C is changed to control adau1966a only to read some register states. I'm sure the data was written to 1966a,It's difficult to position at the moment .

      Do you have any suggestions on this noise problem , Are there any requirements on the sequence of starting adau1466 and adau1966a?


  • Hello terryyuan,

    Sorry for the delay in answering. Is there still an issue with the customer's system?

    If the Master clock is coming from the DSP then it should be booted first then boot up the DAC. 

    What sampling rate is being used?

    Who is the master for the frame sync and bit clock?

    what is the IOVDD being used?

    TDM 16 timing can be difficult to meet. There are many variables like the PCB layout details, the distance between the parts, and then the drive strength might need to be increased in the DSP depending on the clocking details. 

    Dave T

  • Hi Dave:

          Sorry for the delay in answering. 

           When the customer started ADAU1452, the child process started ADAU1966, so the clock was not allocated, which led to this problem. Now it has been solved. Thank you for reminding me

    terry yuan