SSM2529 PLL's not working

I have a problem with the PLL configuration on the SSM2529, or I just don't understand how it work. Also the information on this chip is super shitty.

I want to play a sound file that has a sample rate of 11.025kHz, so I need a MCLK of 5.6448MHz. I can't supply that, but I can do 1.411200MHz. Luckly 1.411200MHz*4 = 5.644800MHz.

So I would think that I just need to set the DPLL NDIV = 4 and it should work, but nothing happens. It says the DPLL is locked but if it really is is anyone's best guess.

I use SigmaStudio and below is a screen shot of my setup.

The weird thing is that when I set it up like this, then it does work sort off.

Can anyone tell me why this isn't working or am I not understanding how this DPLL is working?


added extra info
[edited by: JohannBennett at 11:59 PM (GMT -5) on 7 Jan 2021]
  • 0
    •  Analog Employees 
    on Jan 12, 2021 9:52 PM 1 month ago

    Hello Johann,

    The analog PLL cannot lock to an MCLK that low in frequency so it was probably trying to lock and putting out an unstable output so it kind of worked. 

    Did you set the MCS bits to the proper setting? You can see the settings in Table 48 on page 27. 

    Unfortunately the settings in SigmaStudio are not labeled very well so you should look at the Capture window to see what the setting really is. 

    According to Table 48 you will need to set it to 0b001. 

    Here is a screenshot that I see will set it to the correct value.

    This is on the Chip Control tab of SigmaStudio.

    Give this a try

    Dave T

  • Yes, I agree, that's why I didn't try to use the analog PLL. I feel like you didn't look at the diagrams I attached.

    Setting the MCS bits makes no difference to anything, tried all of them, even if you supply the correct MCLK ( 5.6448MHz) and by pass the PLL's completely, the MCS setting makes no difference to anything that I could see or hear.