I have a problem with the PLL configuration on the SSM2529, or I just don't understand how it work. Also the information on this chip is super shitty.
I want to play a sound file that has a sample rate of 11.025kHz, so I need a MCLK of 5.6448MHz. I can't supply that, but I can do 1.411200MHz. Luckly 1.411200MHz*4 = 5.644800MHz.
So I would think that I just need to set the DPLL NDIV = 4 and it should work, but nothing happens. It says the DPLL is locked but if it really is is anyone's best guess.
I use SigmaStudio and below is a screen shot of my setup.
The weird thing is that when I set it up like this, then it does work sort off.
Can anyone tell me why this isn't working or am I not understanding how this DPLL is working?
added extra info
[edited by: JohannBennett at 11:59 PM (GMT -5) on 7 Jan 2021]