AD1937 - does it support 8kHz

Hello,

I am using AD1937, I need to 8kHz sampling frequency application with AD1937 but first page in the manual  said that it supports 8kHz to 192kHz.

But I can't find how to set register to use for 8kHz.

How can I set AD1937 to support 8kHz?

Thanks.

Songhee.

AD1937.pdf
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  • In the manual, "Note that it is not possible to use a direct clock for the ADCs set to the 192 kHz mode." I should read more carefully..

    Thanks. Your answer is very helpful for me to test for all use case with AD1937.

    But I have one more thing to be clear in PLL setting.

    Ih 192kHz case, should I apply 48kHz*512 clock to MCLK in, set  Input 512 in PLL Clock Control 0, PLL clock in PLL Clock Control 1, set sampling rate 128kHz/176.4kHz/192kHz in DAC Control 0?

    I am a little bit confused at how to set PLL target frequency.

    Can you please explain to me about the pll clock control?

    Hmm, for example, master clock rate setting in PLL and Clock Control 0 Register means the frequency of MCLK in or target frequnecy of PLL out?

    How does it determin the target frequency of PLL?

    Thanks again.

    Songhee.

Reply
  • In the manual, "Note that it is not possible to use a direct clock for the ADCs set to the 192 kHz mode." I should read more carefully..

    Thanks. Your answer is very helpful for me to test for all use case with AD1937.

    But I have one more thing to be clear in PLL setting.

    Ih 192kHz case, should I apply 48kHz*512 clock to MCLK in, set  Input 512 in PLL Clock Control 0, PLL clock in PLL Clock Control 1, set sampling rate 128kHz/176.4kHz/192kHz in DAC Control 0?

    I am a little bit confused at how to set PLL target frequency.

    Can you please explain to me about the pll clock control?

    Hmm, for example, master clock rate setting in PLL and Clock Control 0 Register means the frequency of MCLK in or target frequnecy of PLL out?

    How does it determin the target frequency of PLL?

    Thanks again.

    Songhee.

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