AD1937 - asking 4channel TDM configuration

Hello, AD Engineers.

I have a question about 4 channel, 16bits, TDM single line configuration.

I set 4 channel, 48kHz, 16bits, TDM single line, master mode with direct MCLK mode(48kHz*512) in AD1937.

I checked frequency from BCLK(6.144MHz), FS(48kHz) from ad1937.

It seems OK for 48kHz 128fs(4 channels).

But when I checked speaker out, I can hear 4 speakers out.

Each speaker has 2 channels, so I expected that I can hear 2 speakers out.

In manual page 20, Figure 16 shows that one slot has 32bits in 8 channel DAC configuration.

When AD1937 is set to 16bits, 4 channels and TDM mode, does one slot size become 16bits?

Or should I change MCLK frequency for 128fs, TDM mode?

Please give me 4channel TDM configuration.

Thanks alot.

Songhee.

  • 0
    •  Analog Employees 
    on Nov 11, 2011 8:27 PM

    Hi Songhee,

    I would like to set up an AD1937 with your exact register settings in order to duplicate your configuration. Would you please post your register settings? I would like to see your schematic as well.

    Best regards,

    Coleman

  • Hello, Coleman.

    I tried to test audio playback for several cases.

    And one of cases is interesting, that when I put the data in slot0 like following picture, I can hear audio sound from DACL1 and DACL3.

    Also I tested for stereo setting in 128fs, like following picture, it has sound only from DACL1 and DACR1.

    So I think that there is no board issue for this phenomenon (like shadowing).

    If there is board issue, even stero mode, other jack should have sound, shouldn't it?

    I think that when I set serial format to TDM single-line and 4 channels frame, I might need to set something else register or there is some limitation.

    My register dump is here,

    ::Reg Addr 0x00 0x94 : 0x94

    ::Reg Addr 0x01 0x0f : 0x07

    ::Reg Addr 0x02 0x48 : 0x48

    ::Reg Addr 0x03 0xfa : 0xfa

    ::Reg Addr 0x04 0x18 : 0x18

    ::Reg Addr 0x05 0x00 : 0x00

    ::Reg Addr 0x06 0x00 : 0x00

    ::Reg Addr 0x07 0x00 : 0x00

    ::Reg Addr 0x08 0x00 : 0x00

    ::Reg Addr 0x09 0x00 : 0x00

    ::Reg Addr 0x0a 0x00 : 0x00

    ::Reg Addr 0x0b 0x00 : 0x00

    ::Reg Addr 0x0c 0x00 : 0x00

    ::Reg Addr 0x0d 0x00 : 0x00

    ::Reg Addr 0x0e 0x00 : 0x00

    ::Reg Addr 0x0f 0x23 : 0x23

    ::Reg Addr 0x10 0x26 : 0x26

    Thanks.

    Songhee.

  • 0
    •  Analog Employees 
    on Dec 6, 2011 7:30 PM

    Hi Songhee,

    I have looked over your register settings and I have some suggestions:

    My register dump is,

    ::Reg Addr 0x00 0x94 : 0x94        0x91 (Shut off the PLL here; MCLK master setting does nothing here.)

    ::Reg Addr 0x01 0x0f : 0x07          0x03 (You turned off the Common Mode Voltage generator. Your audio is not functioning properly)

    ::Reg Addr 0x02 0x48 : 0x48          Curious about your need to use Left-Justified format here. You are using I2S in the ADC.

    ::Reg Addr 0x03 0xfa : 0xfa           This register looks like an issue. Why are flipping the LRCLK and BCLK polarity? I have not seen your schematic; the Internal generation of BCLK option is used when you do not want to connect BCLK from this device to another.

    ::Reg Addr 0x04 0x18 : 0x18

    ::Reg Addr 0x05 0x00 : 0x00

    ::Reg Addr 0x06 0x00 : 0x00

    ::Reg Addr 0x07 0x00 : 0x00

    ::Reg Addr 0x08 0x00 : 0x00

    ::Reg Addr 0x09 0x00 : 0x00

    ::Reg Addr 0x0a 0x00 : 0x00

    ::Reg Addr 0x0b 0x00 : 0x00

    ::Reg Addr 0x0c 0x00 : 0x00

    ::Reg Addr 0x0d 0x00 : 0x00

    ::Reg Addr 0x0e 0x00 : 0x00

    ::Reg Addr 0x0f 0x23 : 0x23           You are using I2S here, but Left-Justified in the DAC? Is that correct?

    ::Reg Addr 0x10 0x26 : 0x26         Here you are using TDM8,

    Please let me know if these suggested settings help with your operation of the AD1937.

    Best regards,

    Coleman

  • Hello, Coleman.

    I tested with your comment. But I can still hear sound from DAC1 and DAC3 at same time.

                    Addr Write  Read

    ::Reg Addr 0x00 0x91 : 0x91

    ::Reg Addr 0x01 0x03 : 0x03
    ::Reg Addr 0x02 0x48 : 0x48
    ::Reg Addr 0x03 0x3a : 0x3a
    ::Reg Addr 0x04 0x18 : 0x18
    ::Reg Addr 0x05 0x00 : 0x00
    ::Reg Addr 0x06 0x1f : 0x1f
    ::Reg Addr 0x07 0x1f : 0x1f
    ::Reg Addr 0x08 0x1f : 0x1f
    ::Reg Addr 0x09 0x1f : 0x1f
    ::Reg Addr 0x0a 0x1f : 0x1f
    ::Reg Addr 0x0b 0x1f : 0x1f
    ::Reg Addr 0x0c 0x1f : 0x1f
    ::Reg Addr 0x0d 0x1f : 0x1f
    ::Reg Addr 0x0e 0x01 : 0x01 <-- I turned off this time.
    ::Reg Addr 0x0f 0x27 : 0x27
    ::Reg Addr 0x10 0x16 : 0x16

    I think that in 128fs TDM mode, ad1937 might operate DAC1 and DAC3 at the same time. Because 256fs TDM mode doesn't have any issue.

    Thanks.

    Songhee.

  • 0
    •  Analog Employees 
    on Dec 9, 2011 1:08 AM

    Hi Songhee,

    I have confirmed that you are correct: when using the DACs in TDM4 mode, the data packets effectively repeat coverage for 2 groups of 4 DAC channels. If the signal at the output of DACs 3 and 4 is not desirable, I would recommend that you mute the DAC 3 and 4 outputs using the registers.

    Also, I noticed that you are using the internal volume control to reduce the signal level coming out of the DAC by ~11.5 dB. Please note that this volume control is in the digital domain and so will not lower the noise level inthe analog section of the DAC. You are reducing the SNR by 11.5 dB by using this methos. I would recommend that you run the DAC at full level and reduce the signal level in the analog domain outside the AD1937.

    Best regards,

    Coleman