ADMP441, SSM2529 Speech transmission

Hello Eystein,

The components in Figures 31 and 32, to the right of the op amp output serve the following purpose:

• 604 ohm resistor serves as dampening for the op amp output to eliminate any parasitic oscillations, and also as protection against short circuits for this multiple use eval board. If you are designing a closed system, you can reduce this value to 47 ohm or eliminate it altogether.
• the 4.7 uF AC coupling capacitor blocks DC voltage from the op amp output, while passing the AC audio signal.
• the 2.2 nF filter is a third pole for the low-pass filter.
• the 49k9 resistor across the output keeps any stray charge from building up on the 4.7 uF capacitor when there is no load connected, eliminating any popping sound when a load is plugged in during operation. In your hard-wired design, this will not be necessary.

It is not necessary to provide 3 poles of filtering in all cases, I have seen successful designs with a single passive pole around 100 kHz. The issue that might arise in the case of a simple passive filter would be level matching instead of impedance matching. The AD1938 DAC puts out 1 V RMS at full scale. It is important that you match this level correctly with the maximum level allowed by your amplifier supply voltage. An op amp circuit would allow you to add gain to the signal if needed.

Best regards,

Coleman

Thank you for a thorough explanation.

I have looked further at your catalog of op-amps. Since I am designing a portable unit, I examined the following, with 5 V supply:

AD8605/AD8606/AD8608, AD8691/AD8692/AD8694, AD8655/AD8656, and the ADA4075-2.

I am very unsure of which of these are best suited.

The last one was suggested by AD's website as a replacement for the OP275 which was included in the AD1938 datasheet, in the Sallen-Key filter (I am also looking at Delyiannis bandpass filters, for lower cost, more uniform component values). It would appear I don't need more than unity gain and Q=1, but possibly multiple poles.

Question1: Am I right in assuming that the AD8694 is like the AD8691 only with more op-amps integrated into one? (for prototyping this could be very useful)

Question2: How crucial is slew rate in this low power, audio application?

I see the OP275 has a higher slew rate than the AD8694, but this is perhaps because of the different power/voltage rating?

Thanks for your help.

regards, Eystein

This application note may be helpful for your application. It was specifically written for mic preamp applications, but is applicable for many different audio applications. You can see in here how to select an amplifier with appropriate slew rate, along with other amp specifications.

Yes, the AD8694 and AD8691 are the same amplifier design. One has four amps in a package and the other has just one.

One thing to keep in mind when choosing an op amp for use after a Sigma Delta DAC: the op amp needs to be fast enough to handle the out-of-band energy that we are removing with the low pass filter, not just the audio band. 5 V/uS is as slow as I would recommend in this application.

Okay, I will take this into consideration.

One thing that is very confusing to me is the clocking scheme of the AD1938. I am designing a test PCB for it as a DAC, and I'm using an Atmel ATmega8 as microcontroller, and an external crystal for the AD1938 master clock. I must have a 256 x 32 kHz  setting. Am I right in assuming I should use a 8.192 MHz crystal at MCLKI/XI? And seeing as the DAC internal clock mode varies,

Datasheet:

The internal clock for the DACs varies by mode: 512 × fS (48 kHz

mode), 256 × fS (96 kHz mode), or 128 × fS (192 kHz mode).

What mode should I use at 32 kHz?

On page 25 in AD1938 datasheet there's an option to set the DAC control register 2:1 to 00, to configure a 32 kHz/44.1 kHz/48 kHz samplerate. How does one further configure it to specifically 32 kHz?

Thanks again,

Eystein

You are correct that you must use an MCLK of 8.192 MHz to run the part with an Fs of 32 kHz.

MCLKI pin functionality 0x00 [2:1] should be left as 0b00 for 256 x Fs operation..

The sample rate bits for both 0x14 [7:6] ADC and 0x02 [2:1] DAC should be left as default: the internal clock multiplier window runs from 32 kHz to 48 kHz for setting 0b00.

Regards,

Coleman