We are using a SSM2603 codec in an application.
It is in "Slave mode" meaning the BCLK signal is coming into the SSM2603. There is a bit BCLKINV for register address 7 that is "BCLK Inversion control". Does this invert the incoming BCLK in slave mode or does it invert it coming out (when run in master mode).
Or both of the two cases?
We need to invert our BCLK going into the 2603 but the engineer here forgot to put an inverter on our board, so having the 2603 invert it saves us rework and adding an inverter to the board.
There is no explanation in the data sheet regarding this bit, if it inverts the clock coming in or going out or either.